From 345d202d662fae57ab7a13432f213cd4109e5e3c Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 15 Apr 2019 16:17:59 +0200 Subject: Documentation: Add FIT Describe the Firmware Interface Table and reference useful documentation. Change-Id: I00abc1fd13be7b48d56ba8cb65d2542ed07f9017 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/32325 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- Documentation/soc/intel/fit.dia | Bin 0 -> 3178 bytes Documentation/soc/intel/fit.md | 60 ++++++++++++++++++ Documentation/soc/intel/fit.svg | 132 +++++++++++++++++++++++++++++++++++++++ Documentation/soc/intel/index.md | 1 + 4 files changed, 193 insertions(+) create mode 100644 Documentation/soc/intel/fit.dia create mode 100644 Documentation/soc/intel/fit.md create mode 100644 Documentation/soc/intel/fit.svg (limited to 'Documentation/soc') diff --git a/Documentation/soc/intel/fit.dia b/Documentation/soc/intel/fit.dia new file mode 100644 index 0000000000..7e07978f71 Binary files /dev/null and b/Documentation/soc/intel/fit.dia differ diff --git a/Documentation/soc/intel/fit.md b/Documentation/soc/intel/fit.md new file mode 100644 index 0000000000..8b638f0433 --- /dev/null +++ b/Documentation/soc/intel/fit.md @@ -0,0 +1,60 @@ +# Intel Firmware Interface Table + +The FIT allows to run code before the actual IA32 reset vector is executed +by the CPU. The FIT resides in the BIOS region (usually near the reset vector) +and is pointed to by the FIT pointer residing at `0xFFFFFFC0`. + +## Table layout +The table consists of blocks each 16 bytes in size. +The first is called *FIT header* the other are called *FIT entry*. + +![FIT in x86 memory map][fit] + +[fit]: fit.svg + +## Fit types + +Each entry has a *type* that give the other bits in the entry a different +meaning. The following types are known: + +```eval_rst ++-----------+------------------------------------------------------------------+ +| no. | Description | ++===========+==================================================================+ +| 0x0 | HEADER. | ++-----------+------------------------------------------------------------------+ +| 0x1 | MICROCODE. | ++-----------+------------------------------------------------------------------+ +| 0x2 | STARTUP_ACM. | ++-----------+------------------------------------------------------------------+ +| 0x7 | BIOS_STARTUP_MODULE. | ++-----------+------------------------------------------------------------------+ +| 0x8 | TPM_POLICY. | ++-----------+------------------------------------------------------------------+ +| 0x9 | BIOS_POLICY. | ++-----------+------------------------------------------------------------------+ +| 0xa | TXT_POLICY. | ++-----------+------------------------------------------------------------------+ +| 0xb | KEY_MANIFEST. | ++-----------+------------------------------------------------------------------+ +| 0xc | BOOT_POLICY_MANIFEST. | ++-----------+------------------------------------------------------------------+ +| 0x10 | CSE_SECURE_BOOT. | ++-----------+------------------------------------------------------------------+ +| 0x2d | TXTSX_POLICY. | ++-----------+------------------------------------------------------------------+ +| 0x2f | JMP_DEBUG_POLICY. | ++-----------+------------------------------------------------------------------+ +| 0x7f | SKIP. | ++-----------+------------------------------------------------------------------+ +``` + +## Usage in coreboot + +The most common usage of FIT is to use *Type1* to update microcode before +execution of the IA32 reset vector happens. + +## References + +* [Intel TXT LAB handout](https://downloadmirror.intel.com/18931/eng/Intel%20TXT%20LAB%20Handout.pdf) +* [FIT bios specification](https://www.intel.com/content/dam/www/public/us/en/documents/guides/fit-bios-specification.pdf) diff --git a/Documentation/soc/intel/fit.svg b/Documentation/soc/intel/fit.svg new file mode 100644 index 0000000000..eb6c696bb7 --- /dev/null +++ b/Documentation/soc/intel/fit.svg @@ -0,0 +1,132 @@ + + + + + + + + + + + + + + + + + + bootblock + + + + + + + + + + + + + + + 4 GiB + + + 4 GiB - 10h + + + 4 GiB - x + + + 4 GiB - 40 h + + + + FIT Ptr + + + IA32 reset vec + + + + + + + + + + + + 4 GiB - z + + + + + + + + + + + 4 GiB - y + + + ACM + + + BOOTBLOCK + CODE + + + uCode + + + + + + + + + + + + + + + + FIT header + + + Type1 entry + + + Type2 entry + + + Type7 entry + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md index 4f6b4f21b6..86f4de7155 100644 --- a/Documentation/soc/intel/index.md +++ b/Documentation/soc/intel/index.md @@ -8,3 +8,4 @@ This section contains documentation about coreboot on specific Intel SOCs. - [FSP](fsp/index.md) - [Ice Lake/9th Gen Core-i series](icelake/index.md) - [MP Initialization](mp_init/mp_init.md) +- [Firmware Interface Table](fit.md) -- cgit v1.2.3