From 5554226426872051165c077009bd968837585cbd Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Tue, 9 Nov 2021 08:09:40 +0100 Subject: Spell Intel Cooper Lake-SP with a space Use the official spelling. [1] [1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda Signed-off-by: Paul Menzel Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer --- Documentation/releases/coreboot-4.14-relnotes.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/releases') diff --git a/Documentation/releases/coreboot-4.14-relnotes.md b/Documentation/releases/coreboot-4.14-relnotes.md index 40589a1234..4f2b00e153 100644 --- a/Documentation/releases/coreboot-4.14-relnotes.md +++ b/Documentation/releases/coreboot-4.14-relnotes.md @@ -142,7 +142,7 @@ primarily to serve the needs of the server market. coreboot support for Xeon-SP is in src/soc/intel/xeon_sp directory. This release has support for SkyLake-SP (SKX-SP) which is the 2nd -generation, and for CooperLake-SP (CPX-SP) which is the 3rd generation +generation, and for Cooper Lake-SP (CPX-SP) which is the 3rd generation or the latest generation [2] on market. With this release, the codebase for multiple generations of Xeon-SP -- cgit v1.2.3