From 0a6c62fbbe979b3363152ee8c5aace8a0a12871d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Wed, 18 Sep 2019 16:31:50 +0200 Subject: mb/supermicro: restructure x11ssh-tf to represent a x11 board series MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Most of the X11 boards with socket LGA1151 are basically the same boards with just some minor differences like different NICs (1 GbE, 10 GbE), number of NICs / PCIe ports etc. There are about 20 boards that can be added, if there is a community for testing. To be able to add more x11 boards easily like x11ssm (see CB:35427) this restructures the x11ssh tree to represent a "X11 LGA1151 series". There were multiple suggestions for the structure like grouping by series (x10, x11, x...), grouping by chipset or by cpu family. It turned out that there are some "X11 series" boards that are completely different. Grouping by chipset or cpu family suffers from the same problem. This is why finally we agreed on grouping by series and socket ("X11 LGA1151 series"). The structure uses the common baseboard scheme, while there is no "real" baseboard we know of. By checking images, comparing logs etc. we came to the conclusion that Supermicro does have some base layout which is only modified a bit for the different boards. X11SSH-TF was moved to the variants/ folder with it's gpio.h. As we expect the other boards to have mostly the same device tree, there is a common devicetree that gets overridden by each variant's overridetree. Besides that some very minor modifications happened (formatting, fixing comments, ...) but not much. Documentation is reworked in CB:35547 Change-Id: I8dc4240ae042760a845e890b923ad40478bb8e29 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/35426 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- .../supermicro/x11-lga1151-series/index.md | 7 ++ .../x11-lga1151-series/x11ssh-tf/x11ssh-tf.md | 73 +++++++++++++++++++++ .../x11ssh-tf/x11ssh-tf_flash.jpg | Bin 0 -> 138435 bytes Documentation/mainboard/supermicro/x11ssh-tf.md | 73 --------------------- .../mainboard/supermicro/x11ssh_flash.jpg | Bin 138435 -> 0 bytes 5 files changed, 80 insertions(+), 73 deletions(-) create mode 100644 Documentation/mainboard/supermicro/x11-lga1151-series/index.md create mode 100644 Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md create mode 100644 Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg delete mode 100644 Documentation/mainboard/supermicro/x11ssh-tf.md delete mode 100644 Documentation/mainboard/supermicro/x11ssh_flash.jpg (limited to 'Documentation/mainboard/supermicro') diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/index.md b/Documentation/mainboard/supermicro/x11-lga1151-series/index.md new file mode 100644 index 0000000000..79d2571009 --- /dev/null +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/index.md @@ -0,0 +1,7 @@ +# X11 LGA1151 series + +The supermicros X11 series with socket LGA1151 are mostly the same boards with some minor +differences in internal and external interfaces like available PCIe slots, 1 GbE, 10 GbE, +IPMI etc. This is why those boards are grouped as "X11 LGA1151 series". + +- [X11SSH-TF](x11ssh-tf/x11ssh-tf.md) diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md new file mode 100644 index 0000000000..79e7f3e5eb --- /dev/null +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md @@ -0,0 +1,73 @@ +# Supermicro X11SSH-TF + +This section details how to run coreboot on the [Supermicro X11SSH-TF]. + +## Required proprietary blobs + +* [Intel FSP2.0] +* Intel ME + +## Flashing coreboot + +The board can be flashed externally using *some* programmers. +The CH341 was found working, while Dediprog won't detect the chip. + +For more details have a look at the [flashing tutorial]. + +The flash IC can be found between the two PCIe slots near the southbridge: +![](x11ssh-tf_flash.jpg) + +## BMC (IPMI) + +This board has an ASPEED [AST2400], which has BMC functionality. The +BMC firmware resides in a 32 MiB SOIC-16 chip in the corner of the +mainboard near the [AST2400]. This chip is an [MX25L25635F]. + +## Known issues + +- Intel SGX causes secondary APs to crash (disabled for now). +- Tianocore doesn't work with Aspeed NGI, as it's text mode only. +- SMBus / I2C does not work (interrupt timeout) + +## Tested and working + +- USB ports +- M.2 2280 NVMe slot +- 2x 10GB Ethernet +- SATA +- RS232 +- VGA on Aspeed +- Super I/O initialisation +- ECC DRAM detection +- PCIe slots +- TPM on TPM expansion header +- BMC (IPMI) + +## Technology + +```eval_rst ++------------------+--------------------------------------------------+ +| CPU | Intel Kaby Lake | ++------------------+--------------------------------------------------+ +| PCH | Intel C236 | ++------------------+--------------------------------------------------+ +| Super I/O | ASPEED AST2400 | ++------------------+--------------------------------------------------+ +| Coprocessor | Intel SPS (server version of the ME) | ++------------------+--------------------------------------------------+ +| Coprocessor | ASPEED AST2400 | ++------------------+--------------------------------------------------+ +``` + +## Extra links + +- [Board manual] + +[AST2400]: https://www.aspeedtech.com/products.php?fPath=20&rId=376 +[Board manual]: https://www.supermicro.com/manuals/motherboard/C236/MNL-1783.pdf +[flashrom]: https://flashrom.org/Flashrom +[MX25L25635F]: https://media.digikey.com/pdf/Data%20Sheets/Macronix/MX25L25635F.pdf +[N25Q128A]: https://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_128mb_3v_65nm.pdf +[flashing tutorial]: ../../../../flash_tutorial/ext_power.md +[Intel FSP2.0]: ../../../../soc/intel/fsp/index.md +[Supermicro X11SSH-TF]: https://www.supermicro.com/en/products/motherboard/X11SSH-TF diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg new file mode 100644 index 0000000000..8ab07f23c7 Binary files /dev/null and b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg differ diff --git a/Documentation/mainboard/supermicro/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11ssh-tf.md deleted file mode 100644 index 16e70d4a9f..0000000000 --- a/Documentation/mainboard/supermicro/x11ssh-tf.md +++ /dev/null @@ -1,73 +0,0 @@ -# Supermicro X11SSH-TF - -This section details how to run coreboot on the [Supermicro X11SSH-TF]. - -## Required proprietary blobs - -* [Intel FSP2.0] -* Intel ME - -## Flashing coreboot - -The board can be flashed externally using *some* programmers. -The CH341 was found working, while Dediprog won't detect the chip. - -For more details have a look at the [flashing tutorial]. - -The flash IC can be found between the two PCIe slots near the southbridge: -![](x11ssh_flash.jpg) - -## BMC (IPMI) - -This board has an ASPEED [AST2400], which has BMC functionality. The -BMC firmware resides in a 32 MiB SOIC-16 chip in the corner of the -mainboard near the [AST2400]. This chip is an [MX25L25635F]. - -## Known issues - -- Intel SGX causes secondary APs to crash (disabled for now). -- Tianocore doesn't work with Aspeed NGI, as it's text mode only. -- SMBus / I2C does not work (interrupt timeout) - -## Tested and working - -- USB ports -- M.2 2280 NVMe slot -- 2x 10GB Ethernet -- SATA -- RS232 -- VGA on Aspeed -- Super I/O initialisation -- ECC DRAM detection -- PCIe slots -- TPM on TPM expansion header -- BMC (IPMI) - -## Technology - -```eval_rst -+------------------+--------------------------------------------------+ -| CPU | Intel Kaby Lake | -+------------------+--------------------------------------------------+ -| PCH | Intel C236 | -+------------------+--------------------------------------------------+ -| Super I/O | ASPEED AST2400 | -+------------------+--------------------------------------------------+ -| Coprocessor | Intel SPS (server version of the ME) | -+------------------+--------------------------------------------------+ -| Coprocessor | ASPEED AST2400 | -+------------------+--------------------------------------------------+ -``` - -## Extra links - -- [Board manual] - -[AST2400]: https://www.aspeedtech.com/products.php?fPath=20&rId=376 -[Board manual]: https://www.supermicro.com/manuals/motherboard/C236/MNL-1783.pdf -[flashrom]: https://flashrom.org/Flashrom -[MX25L25635F]: https://media.digikey.com/pdf/Data%20Sheets/Macronix/MX25L25635F.pdf -[N25Q128A]: https://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_128mb_3v_65nm.pdf -[flashing tutorial]: ../../flash_tutorial/ext_power.md -[Intel FSP2.0]: ../../soc/intel/fsp/index.md -[Supermicro X11SSH-TF]: https://www.supermicro.com/en/products/motherboard/X11SSH-TF diff --git a/Documentation/mainboard/supermicro/x11ssh_flash.jpg b/Documentation/mainboard/supermicro/x11ssh_flash.jpg deleted file mode 100644 index 8ab07f23c7..0000000000 Binary files a/Documentation/mainboard/supermicro/x11ssh_flash.jpg and /dev/null differ -- cgit v1.2.3