From c4d56d668f682f7d0d77a2e02f4728b1299f406e Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 5 Aug 2019 08:23:52 +0200 Subject: Documentation: Advertise support for OpenSBI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ie990bb95fcdcfab0246e8c694704022d9b8b5195 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/34690 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer Reviewed-by: Philipp Hug Reviewed-by: Xiang Wang --- Documentation/mainboard/sifive/hifive-unleashed.md | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation/mainboard/sifive/hifive-unleashed.md') diff --git a/Documentation/mainboard/sifive/hifive-unleashed.md b/Documentation/mainboard/sifive/hifive-unleashed.md index 495dade212..4dbbf0e073 100644 --- a/Documentation/mainboard/sifive/hifive-unleashed.md +++ b/Documentation/mainboard/sifive/hifive-unleashed.md @@ -17,7 +17,6 @@ The following things are still missing from this coreboot port: - Provide serial number to payload (e.g. in device tree) - Implement instruction emulation - Support for booting Linux on RISC-V -- Add support to run OpenSBI payload in m-mode - SMP support in trap handler ## Configuration -- cgit v1.2.3