From de8c7e39bce97f13e09e53a3a1bdf4edcfebec79 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 14 Feb 2016 14:55:29 -0800 Subject: Documentation: x86 device tree processing and memory map Add documentation on: * FSP Silicon Init * How to start the x86 device tree processing for ramstage * Disabling the PCI devices * Generic PCI device drivers * Memory map support TEST=None Change-Id: If8f729a0ea1d48db4d5ec1d4ae3ad693e9fe44f0 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13718 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- Documentation/Intel/development.html | 83 +++++++++++++++++++++++++++++++++++- 1 file changed, 82 insertions(+), 1 deletion(-) (limited to 'Documentation/Intel/development.html') diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 0cd2bd59b7..a3136d19d1 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -94,6 +94,24 @@ +
  • + Implement the .init routine for the + chip operations + structure which calls FSP SiliconInit +
    • +
  • + Start ramstage's + device tree processing + to display the PCI vendor and device IDs +
    • +
  • + Disable the + PCI devices +
    • +
  • + Implement the + memory map +
    • @@ -129,6 +147,31 @@ Disable: CONFIG_DISPLAY_MTRRS=y, MTRRs displayed after call to TempRamExit + + Memory Map + + Implement a device driver for the + north cluster + + coreboot displays the memory map correctly during the BS_WRITE_TABLES state + + + PCI Device Support + Implement a PCI device driver + The device is detected by coreboot and usable by the payload + + + Ramstage state machine + + Implement the chip and domain operations to start the + device tree + processing + + + During the BS_DEV_ENUMERATE state, ramstage now display the device IDs + for the PCI devices on the bus. + + @@ -136,6 +179,19 @@ Where Testing + + Device Tree + + List PCI vendor and device IDs by starting + the device tree processing
    + Disable PCI devices
    + Enable: Implement a PCI device driver + + List: BS_DEV_ENUMERATE state displays PCI vendor and device IDs
    + Disable: BS_DEV_ENUMERATE state shows the devices as disabled
    + Enable: BS_DEV_ENUMERATE state shows the device as on and the device works for the payload + + DRAM @@ -208,11 +264,36 @@ + + SiliconInit + + Implement the .init routine for the + chip operations structure + + During BS_DEV_INIT_CHIPS state, SiliconInit gets called and returns 0x00000000 + + + FspNotify + + The code which calls FspNotify is located in + src/drivers/intel/fsp1_1/fsp_util.c. + The fsp_notify_boot_state_callback routine is called three times as specified + by the BOOT_STATE_INIT_ENTRY macros below the routine. + + + The FspNotify routines are called during: +
      +
    • BS_DEV_RESOURCES - on exit
      • +
    • BS_PAYLOAD_LOAD - on exit
      • +
    • BS_OS_RESUME - on entry (S3 resume)
      • +
    + +
    -

    Modified: 31 January 2016

    +

    Modified: 15 February 2016

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