From f5be5e49993732b02221cd1935bdc12de1a38ac6 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 9 May 2024 11:21:57 +0000 Subject: driver/intel/fsp2_0: Update soc_binding.h for coreboot compatibility Included to address coreboot style header definitions rather using EDK2 header . TEST=Able to build google/rex0. Change-Id: I66559872c8d137d1baef5860fb98cad2a5214368 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/82265 Reviewed-by: Eric Lai Reviewed-by: Ronak Kanabar Tested-by: build bot (Jenkins) --- src/drivers/intel/fsp2_0/include/fsp/soc_binding.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h index ba3e2894ff..2adfaf3d65 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h +++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h @@ -7,6 +7,8 @@ #pragma pack(push) +#include + /** * These includes are required to include headers that are missing in * the FSP headers. Import order matter for the correct PiHob definition @@ -24,7 +26,6 @@ * This file is a implementation specific header. i.e. different * FSP implementations for different chipsets. */ -#include #include #include #if CONFIG(MRC_CACHE_USING_MRC_VERSION) -- cgit v1.2.3