From f531244d20998091bd8c311a4183de0bcc9f6ff2 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 20 May 2020 01:02:18 +0200 Subject: device/pci: Handle unassigned bus resources gracefully The I/O windows of PCI bridges can be disabled individually by setting their limit lower than their base. Always do this if a resource wasn't assigned a value. Change-Id: I73f6817c4b12cb1689627044735d1fed6d825afe Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/41552 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Angel Pons Reviewed-by: Furquan Shaikh --- src/device/pci_device.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 9011f0da4b..e6c6ff31a4 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -510,10 +510,16 @@ static void pci_set_resource(struct device *dev, struct resource *resource) { /* Make certain the resource has actually been assigned a value. */ if (!(resource->flags & IORESOURCE_ASSIGNED)) { - printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " - "assigned\n", dev_path(dev), resource->index, - resource_type(resource), resource->size); - return; + if (resource->flags & IORESOURCE_BRIDGE) { + /* If a bridge resource has no value assigned, + we can treat it like an empty resource. */ + resource->size = 0; + } else { + printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " + "assigned\n", dev_path(dev), resource->index, + resource_type(resource), resource->size); + return; + } } /* If this resource is fixed don't worry about it. */ -- cgit v1.2.3