From f34bdf8c5e62244e753836b1f00977bad7041bf9 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Fri, 12 Feb 2021 15:39:38 -0800 Subject: mainboard/pine64/rockpro64: Add initial ROCKPro64 support This adds initial support for the Pine64 ROCKPro64 board. The ROCKPro64 (http://pine64.org/rockpro64) is a SBC using the RK3399 SoC with up to 4GB LPDDR4. So far only the bootblock part works, the romstage starts to execute, though. For ramstage to work we'll need to port some of the changes required for LPDDR4 vs LPDDR3. This will be addressed in follow up changes. UART2 on the PI-2 connector can be used as a coreboot console. GND is pin 6 TXD is pin 8 RXD is pin 10 Flashing: I used an OpenWRT nightly for the ROCKPro64 and its builtin tool. $ mtd write coreboot.rom /dev/mtd0 Recovering from a bad flash: To recover from a bad flash bridging pins 23 and 25 on the PI-2 connector will make the board boot from SD card. Signed-off-by: Moritz Fischer Change-Id: I47d0031fff8ee10b11ad74935eaeb05f1f7eb4b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50625 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/pine64/Kconfig | 17 ++++++++++++ src/mainboard/pine64/Kconfig.name | 2 ++ src/mainboard/pine64/rockpro64/Kconfig | 36 ++++++++++++++++++++++++ src/mainboard/pine64/rockpro64/Kconfig.name | 2 ++ src/mainboard/pine64/rockpro64/Makefile.inc | 5 ++++ src/mainboard/pine64/rockpro64/board.h | 10 +++++++ src/mainboard/pine64/rockpro64/board_info.txt | 6 ++++ src/mainboard/pine64/rockpro64/bootblock.c | 40 +++++++++++++++++++++++++++ src/mainboard/pine64/rockpro64/devicetree.cb | 5 ++++ src/mainboard/pine64/rockpro64/reset.c | 11 ++++++++ 10 files changed, 134 insertions(+) create mode 100644 src/mainboard/pine64/Kconfig create mode 100644 src/mainboard/pine64/Kconfig.name create mode 100644 src/mainboard/pine64/rockpro64/Kconfig create mode 100644 src/mainboard/pine64/rockpro64/Kconfig.name create mode 100644 src/mainboard/pine64/rockpro64/Makefile.inc create mode 100644 src/mainboard/pine64/rockpro64/board.h create mode 100644 src/mainboard/pine64/rockpro64/board_info.txt create mode 100644 src/mainboard/pine64/rockpro64/bootblock.c create mode 100644 src/mainboard/pine64/rockpro64/devicetree.cb create mode 100644 src/mainboard/pine64/rockpro64/reset.c diff --git a/src/mainboard/pine64/Kconfig b/src/mainboard/pine64/Kconfig new file mode 100644 index 0000000000..238192e1b2 --- /dev/null +++ b/src/mainboard/pine64/Kconfig @@ -0,0 +1,17 @@ +## SPDX-License-Identifier: GPL-2.0-only + +if VENDOR_PINE64 + +choice + prompt "Mainboard model" + +source "src/mainboard/pine64/*/Kconfig.name" + +endchoice + +source "src/mainboard/pine64/*/Kconfig" + +config MAINBOARD_VENDOR + default "Pine64" + +endif # VENDOR_PINE64 diff --git a/src/mainboard/pine64/Kconfig.name b/src/mainboard/pine64/Kconfig.name new file mode 100644 index 0000000000..209cff97f2 --- /dev/null +++ b/src/mainboard/pine64/Kconfig.name @@ -0,0 +1,2 @@ +config VENDOR_PINE64 + bool "Pine64" diff --git a/src/mainboard/pine64/rockpro64/Kconfig b/src/mainboard/pine64/rockpro64/Kconfig new file mode 100644 index 0000000000..4408d77499 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/Kconfig @@ -0,0 +1,36 @@ +## SPDX-License-Identifier: GPL-2.0-only + +if BOARD_PINE64_ROCKPRO64 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select COMMON_CBFS_SPI_WRAPPER + select SOC_ROCKCHIP_RK3399 + select SPI_FLASH + select SPI_FLASH_GIGADEVICE + +config MAINBOARD_DIR + string + default "pine64/rockpro64" + +config BOOT_DEVICE_SPI_FLASH_BUS + int + default 1 + +config CONSOLE_SERIAL_UART_ADDRESS + hex + depends on DRIVERS_UART + default 0xFF1A0000 + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## +config DEVICETREE + string + default "devicetree.cb" if BOARD_PINE64_ROCKPRO64 + +config MAINBOARD_PART_NUMBER + string + default "ROCKPro64" if BOARD_PINE64_ROCKPRO64 +endif # BOARD_PINE64_ROCKPRO64 diff --git a/src/mainboard/pine64/rockpro64/Kconfig.name b/src/mainboard/pine64/rockpro64/Kconfig.name new file mode 100644 index 0000000000..03b539f290 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_PINE64_ROCKPRO64 + bool "ROCKPro64" diff --git a/src/mainboard/pine64/rockpro64/Makefile.inc b/src/mainboard/pine64/rockpro64/Makefile.inc new file mode 100644 index 0000000000..575b6f7392 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/Makefile.inc @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +all-y += reset.c + +bootblock-y += bootblock.c diff --git a/src/mainboard/pine64/rockpro64/board.h b/src/mainboard/pine64/rockpro64/board.h new file mode 100644 index 0000000000..e775d3ad03 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/board.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __COREBOOT_SRC_MAINBOARD_PINE64_ROCKPRO64_BOARD_H +#define __COREBOOT_SRC_MAINBOARD_PINE64_ROCKPRO64_BOARD_H + +#include + +#define GPIO_RESET GPIO(1, A, 6) + +#endif /* ! __COREBOOT_SRC_MAINBOARD_PINE64_ROCKPRO64_BOARD_H */ diff --git a/src/mainboard/pine64/rockpro64/board_info.txt b/src/mainboard/pine64/rockpro64/board_info.txt new file mode 100644 index 0000000000..f70801a005 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Pine64 +Board name: ROCKPro64 +Category: sbc +ROM protocol: SPI +ROM socketed: n +Flashrom support: n diff --git a/src/mainboard/pine64/rockpro64/bootblock.c b/src/mainboard/pine64/rockpro64/bootblock.c new file mode 100644 index 0000000000..012bd66b75 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/bootblock.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +void bootblock_mainboard_early_init(void) +{ + if (CONFIG(CONSOLE_SERIAL)) { + _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE, + "CONSOLE_SERIAL_UART should be UART2"); + + /* iomux: select gpio4c[4:3] as uart2 dbg port */ + write32(&rk3399_grf->iomux_uart2c, IOMUX_UART2C); + + /* grf soc_con7[11:10] use for uart2 select */ + write32(&rk3399_grf->soc_con7, UART2C_SEL); + } +} + +static void configure_spi_flash(void) +{ + gpio_input(GPIO(1, A, 7)); /* SPI1_MISO remove pull-up */ + gpio_input(GPIO(1, B, 0)); /* SPI1_MOSI remove pull-up */ + gpio_input(GPIO(1, B, 1)); /* SPI1_CLK remove pull-up */ + gpio_input(GPIO(1, B, 2)); /* SPI1_CS remove pull-up */ + + rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 33 * MHz); + rockchip_spi_set_sample_delay(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 5); + + write32(&rk3399_pmugrf->spi1_rxd, IOMUX_SPI1_RX); + write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX); +} + +void bootblock_mainboard_init(void) +{ + configure_spi_flash(); +} diff --git a/src/mainboard/pine64/rockpro64/devicetree.cb b/src/mainboard/pine64/rockpro64/devicetree.cb new file mode 100644 index 0000000000..5f01ccfda9 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/devicetree.cb @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip soc/rockchip/rk3399 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/pine64/rockpro64/reset.c b/src/mainboard/pine64/rockpro64/reset.c new file mode 100644 index 0000000000..46235da267 --- /dev/null +++ b/src/mainboard/pine64/rockpro64/reset.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include "board.h" + +void do_board_reset(void) +{ + gpio_output(GPIO_RESET, 1); +} -- cgit v1.2.3