From f32d5b8b66cb3679942501c39ee76587b8c0b0f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 27 Jun 2016 15:25:14 +0300 Subject: AMD binaryPI: Split romstage ram stack MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ibbff1fdb1af247550815532ef12f078229f12321 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15467 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/amd/pi/heapmanager.c | 10 +++------- src/cpu/amd/pi/s3_resume.c | 9 +++++---- src/cpu/amd/pi/s3_resume.h | 3 +++ 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/cpu/amd/pi/heapmanager.c b/src/cpu/amd/pi/heapmanager.c index c5e4202090..d4a79b8b3c 100644 --- a/src/cpu/amd/pi/heapmanager.c +++ b/src/cpu/amd/pi/heapmanager.c @@ -25,13 +25,9 @@ UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader) { UINT32 heap = BIOS_HEAP_START_ADDRESS; -#if CONFIG_HAVE_ACPI_RESUME - /* Both romstage and ramstage has this S3 detect. */ - if (acpi_get_sleep_type() == 3) - heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) + - (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); - /* himem_heap_base + high_stack_size */ -#endif + if (acpi_is_wakeup_s3()) + heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH); + return heap; } diff --git a/src/cpu/amd/pi/s3_resume.c b/src/cpu/amd/pi/s3_resume.c index 576a208926..830d1742d3 100644 --- a/src/cpu/amd/pi/s3_resume.c +++ b/src/cpu/amd/pi/s3_resume.c @@ -137,11 +137,12 @@ void restore_mtrr(void) #ifdef __PRE_RAM__ static void move_stack_high_mem(void) { - void *high_stack; + void *high_stack = cbmem_find(CBMEM_ID_ROMSTAGE_RAM_STACK); + if (high_stack == NULL) + halt(); - high_stack = cbmem_find(CBMEM_ID_RESUME_SCRATCH); - memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR, - (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE)); + /* TODO: Make the switch with empty stack instead. */ + memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR, HIGH_ROMSTAGE_STACK_SIZE); #ifdef __x86_64__ __asm__ diff --git a/src/cpu/amd/pi/s3_resume.h b/src/cpu/amd/pi/s3_resume.h index f952055f88..c23c6621e4 100644 --- a/src/cpu/amd/pi/s3_resume.h +++ b/src/cpu/amd/pi/s3_resume.h @@ -31,4 +31,7 @@ void OemAgesaSaveMtrr (void); void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len); +/* This covers node 0 only. */ +#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR) + #endif -- cgit v1.2.3