From f31c2f2b7a27fbb2d8a26125f3d1852c821ea0b7 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 21 Dec 2020 17:09:08 +0100 Subject: mb/up/squared: do LPC/eSPI pad configuration at board-level MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do LPC/eSPI pad configuration at board-level to match other platforms by adding an appropriate early gpio table in the bootblock. The soc code gets dropped in CB:49410. Change-Id: If0693a4419c58dde3c4536698940f03c30304b9d Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/49414 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/up/squared/bootblock.c | 6 ++++-- src/mainboard/up/squared/gpio.h | 5 +++++ src/mainboard/up/squared/gpio_early.h | 39 +++++++++++++++++++++++++++++++++++ 3 files changed, 48 insertions(+), 2 deletions(-) create mode 100644 src/mainboard/up/squared/gpio_early.h diff --git a/src/mainboard/up/squared/bootblock.c b/src/mainboard/up/squared/bootblock.c index fdaaaa182b..58064a1b2f 100644 --- a/src/mainboard/up/squared/bootblock.c +++ b/src/mainboard/up/squared/bootblock.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include +#include + +#include "gpio_early.h" void bootblock_mainboard_init(void) { - lpc_configure_pads(); + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } diff --git a/src/mainboard/up/squared/gpio.h b/src/mainboard/up/squared/gpio.h index 3182675052..037fa35609 100644 --- a/src/mainboard/up/squared/gpio.h +++ b/src/mainboard/up/squared/gpio.h @@ -725,6 +725,11 @@ static const struct pad_config gpio_table[] = { /* SMB_DATA - SMB_DATA */ PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1), + /* + * LPC + * Note: It's unconfirmed if this redundancy to the bootblock table is necessary. + */ + /* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */ PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), diff --git a/src/mainboard/up/squared/gpio_early.h b/src/mainboard/up/squared/gpio_early.h new file mode 100644 index 0000000000..fc7e7e8576 --- /dev/null +++ b/src/mainboard/up/squared/gpio_early.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +#ifndef CFG_GPIO_EARLY_H +#define CFG_GPIO_EARLY_H + +static const struct pad_config early_gpio_table[] = { + /* ------- GPIO Group South-West ------- */ + + /* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */ + PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), + + /* LPC_CLKOUT0 - LPC_CLKOUT0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_CLKOUT1 - LPC_CLKOUT1 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_AD0 - LPC_AD0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_AD1 - LPC_AD1 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_AD2 - LPC_AD2 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_AD3 - LPC_AD3 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_CLKRUNB - LPC_CLKRUNB */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), + + /* LPC_FRAMEB - LPC_FRAMEB */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), +}; + +#endif /* CFG_GPIO_EARLY_H */ -- cgit v1.2.3