From f09f2247d7584975d17a7d4755b279c1c3f6f001 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Wed, 28 Aug 2013 14:43:14 -0700 Subject: arm: libpayload: Make cache invalidation take pointers instead of integers This minor refactoring patch changes the signature of all limited cache invalidation functions in coreboot and libpayload from unsigned long to void * for the address argument, since that's really what you have in 95% of the cases and I think it's ugly to have casting boilerplate all over the place. Change-Id: Ic9d3b2ea70b6aa8aea6647adae43ee2183b4e065 Signed-off-by: Julius Werner Reviewed-on: https://chromium-review.googlesource.com/167338 (cherry picked from commit d550bec944736dfa29fcf109e30f17a94af03576) Signed-off-by: Isaac Christensen Reviewed-on: http://review.coreboot.org/6623 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- payloads/libpayload/arch/armv7/cache.c | 15 ++++++++------- payloads/libpayload/include/armv7/arch/cache.h | 7 ++++--- src/arch/armv7/cache.c | 13 ++++++------- src/arch/armv7/include/arch/cache.h | 7 ++++--- src/soc/samsung/exynos5250/cpu.c | 2 +- src/soc/samsung/exynos5420/cpu.c | 2 +- 6 files changed, 24 insertions(+), 22 deletions(-) diff --git a/payloads/libpayload/arch/armv7/cache.c b/payloads/libpayload/arch/armv7/cache.c index b4a937bf43..3af7cbd28b 100644 --- a/payloads/libpayload/arch/armv7/cache.c +++ b/payloads/libpayload/arch/armv7/cache.c @@ -34,6 +34,7 @@ #include #include +#include #define bitmask(high, low) ((1UL << (high)) + \ ((1UL << (high)) - 1) - ((1UL << (low)) - 1)) @@ -213,16 +214,16 @@ static unsigned int line_bytes(void) * perform cache maintenance on a particular memory range rather than the * entire cache. */ -static void dcache_op_mva(unsigned long addr, - unsigned long len, enum dcache_op op) +static void dcache_op_mva(void const *vaddr, size_t len, enum dcache_op op) { unsigned long line, linesize; + unsigned long paddr = virt_to_phys(vaddr); linesize = line_bytes(); - line = addr & ~(linesize - 1); + line = paddr & ~(linesize - 1); dsb(); - while (line < addr + len) { + while (line < paddr + len) { switch(op) { case OP_DCCIMVAC: dccimvac(line); @@ -241,17 +242,17 @@ static void dcache_op_mva(unsigned long addr, isb(); } -void dcache_clean_by_mva(unsigned long addr, unsigned long len) +void dcache_clean_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCCMVAC); } -void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len) +void dcache_clean_invalidate_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCCIMVAC); } -void dcache_invalidate_by_mva(unsigned long addr, unsigned long len) +void dcache_invalidate_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCIMVAC); } diff --git a/payloads/libpayload/include/armv7/arch/cache.h b/payloads/libpayload/include/armv7/arch/cache.h index 0756f11813..1cd9958fc4 100644 --- a/payloads/libpayload/include/armv7/arch/cache.h +++ b/payloads/libpayload/include/armv7/arch/cache.h @@ -32,6 +32,7 @@ #ifndef ARMV7_CACHE_H #define ARMV7_CACHE_H +#include #include /* SCTLR bits */ @@ -290,13 +291,13 @@ static inline void write_sctlr(uint32_t val) void dcache_clean_invalidate_all(void); /* dcache clean by modified virtual address to PoC */ -void dcache_clean_by_mva(unsigned long addr, unsigned long len); +void dcache_clean_by_mva(void const *addr, size_t len); /* dcache clean and invalidate by modified virtual address to PoC */ -void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len); +void dcache_clean_invalidate_by_mva(void const *addr, size_t len); /* dcache invalidate by modified virtual address to PoC */ -void dcache_invalidate_by_mva(unsigned long addr, unsigned long len); +void dcache_invalidate_by_mva(void const *addr, size_t len); void dcache_clean_all(void); diff --git a/src/arch/armv7/cache.c b/src/arch/armv7/cache.c index b4a937bf43..1f466ce232 100644 --- a/src/arch/armv7/cache.c +++ b/src/arch/armv7/cache.c @@ -213,16 +213,15 @@ static unsigned int line_bytes(void) * perform cache maintenance on a particular memory range rather than the * entire cache. */ -static void dcache_op_mva(unsigned long addr, - unsigned long len, enum dcache_op op) +static void dcache_op_mva(void const *addr, size_t len, enum dcache_op op) { unsigned long line, linesize; linesize = line_bytes(); - line = addr & ~(linesize - 1); + line = (uint32_t)addr & ~(linesize - 1); dsb(); - while (line < addr + len) { + while ((void *)line < addr + len) { switch(op) { case OP_DCCIMVAC: dccimvac(line); @@ -241,17 +240,17 @@ static void dcache_op_mva(unsigned long addr, isb(); } -void dcache_clean_by_mva(unsigned long addr, unsigned long len) +void dcache_clean_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCCMVAC); } -void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len) +void dcache_clean_invalidate_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCCIMVAC); } -void dcache_invalidate_by_mva(unsigned long addr, unsigned long len) +void dcache_invalidate_by_mva(void const *addr, size_t len) { dcache_op_mva(addr, len, OP_DCIMVAC); } diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/armv7/include/arch/cache.h index 0756f11813..1cd9958fc4 100644 --- a/src/arch/armv7/include/arch/cache.h +++ b/src/arch/armv7/include/arch/cache.h @@ -32,6 +32,7 @@ #ifndef ARMV7_CACHE_H #define ARMV7_CACHE_H +#include #include /* SCTLR bits */ @@ -290,13 +291,13 @@ static inline void write_sctlr(uint32_t val) void dcache_clean_invalidate_all(void); /* dcache clean by modified virtual address to PoC */ -void dcache_clean_by_mva(unsigned long addr, unsigned long len); +void dcache_clean_by_mva(void const *addr, size_t len); /* dcache clean and invalidate by modified virtual address to PoC */ -void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len); +void dcache_clean_invalidate_by_mva(void const *addr, size_t len); /* dcache invalidate by modified virtual address to PoC */ -void dcache_invalidate_by_mva(unsigned long addr, unsigned long len); +void dcache_invalidate_by_mva(void const *addr, size_t len); void dcache_clean_all(void); diff --git a/src/soc/samsung/exynos5250/cpu.c b/src/soc/samsung/exynos5250/cpu.c index 6b3ee8bc0b..d880f5f761 100644 --- a/src/soc/samsung/exynos5250/cpu.c +++ b/src/soc/samsung/exynos5250/cpu.c @@ -103,7 +103,7 @@ static void exynos_displayport_init(device_t dev, u32 lcdbase, uint32_t lower = ALIGN_DOWN(lcdbase, MiB); uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB); - dcache_clean_invalidate_by_mva(lower, upper - lower); + dcache_clean_invalidate_by_mva((void *)lower, upper - lower); mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF); printk(BIOS_DEBUG, "Initializing Exynos LCD.\n"); diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c index 3f915f0460..a5dac7a1cf 100644 --- a/src/soc/samsung/exynos5420/cpu.c +++ b/src/soc/samsung/exynos5420/cpu.c @@ -116,7 +116,7 @@ static void exynos_displayport_init(device_t dev, u32 lcdbase, uint32_t lower = ALIGN_DOWN(lcdbase, MiB); uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB); - dcache_clean_invalidate_by_mva(lower, upper - lower); + dcache_clean_invalidate_by_mva((void *)lower, upper - lower); mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF); mmio_resource(dev, 1, lcdbase/KiB, CEIL_DIV(fb_size, KiB)); -- cgit v1.2.3