From efe27cf3f978e7510b272a28b59779bc387c8106 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 4 May 2020 20:59:23 -0700 Subject: soc/amd/common/block/lpc: Add config options for eSPI eSPI on Picasso is configured using the LPC bridge configuration registers. This change enables config options to allow SoC to select if it supports eSPI (SOC_AMD_COMMON_BLOCK_HAS_ESPI) and mainboard to select if it wants to use eSPI instead of LPC for talking to legacy devices and embedded controllers (SOC_AMD_COMMON_BLOCK_USE_ESPI). BUG=b:154445472 Change-Id: I15e9eb25706e09393c019eea4d61b66f17490be6 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/41069 Reviewed-by: Raul Rangel Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/lpc/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig index 3cfbfe5dcd..1ec8dd4668 100644 --- a/src/soc/amd/common/block/lpc/Kconfig +++ b/src/soc/amd/common/block/lpc/Kconfig @@ -9,3 +9,18 @@ config PROVIDES_ROM_SHARING default n help Select this option if the LPC bridge supports ROM sharing. + +config SOC_AMD_COMMON_BLOCK_HAS_ESPI + bool + default n + help + Select this option if platform supports eSPI using D14F3 configuration + registers. + +config SOC_AMD_COMMON_BLOCK_USE_ESPI + bool + depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI + default n + help + Select this option if mainboard uses eSPI instead of LPC (if supported + by platform). -- cgit v1.2.3