From e9f0dfe63185222e403d81dd1b6bce27d81eb9a5 Mon Sep 17 00:00:00 2001 From: Xavi Drudis Ferran Date: Sun, 22 Aug 2010 19:49:46 +0000 Subject: Complete code for errata 343. Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010 says to set the register to 1 before CAR and to 0 after. We were setting it to 0 after CAR, but not to 1 before. Signed-off-by: Xavi Drudis Ferran Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_10xxx/defaults.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h index c133c94c4f..fdbe3d8fe4 100644 --- a/src/cpu/amd/model_10xxx/defaults.h +++ b/src/cpu/amd/model_10xxx/defaults.h @@ -88,6 +88,10 @@ static const struct { { CPUIDFEATURES, AMD_FAM10_ALL, AMD_PTYPE_DC, 0x00000000, 1 << (33-32), 0x00000000, 1 << (33-32) }, /* [ExtendedFeatEn]=1 */ + + { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL, + 0x00000000, 1 << (35-32), + 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() ) */ }; -- cgit v1.2.3