From e9b0b08079f7170463bd2b3aea6d87e8be0b738a Mon Sep 17 00:00:00 2001
From: Jonathan Zhang <jonzhang@fb.com>
Date: Tue, 30 Jun 2020 13:28:52 -0700
Subject: MAINTAINERS: Add entry for src/soc/intel/xeon_sp

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ib8d16057e3882c50bdca454632a64227166016fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Anjaneya "Reddy" Chagam <anjaneya.chagam@intel.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 MAINTAINERS | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index dd98e6d606..e1c16c9260 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -515,6 +515,18 @@ S:	Maintained
 F:	/src/soc/intel/braswell
 F:	/src/vendorcode/intel/fsp/fsp1_1/braswell
 
+INTEL Xeon Sacalable Processor Family
+M:	Jonathan Zhang <jonzhang@fb.com>
+M:	Reddy Chagam <anjaneya.chagam@intel.com>
+M:	Johnny Lin <Johnny_Lin@wiwynn.com>
+M:	Morgan Jang <Morgan_Jang@wiwynn.com>
+M:	Ryback Hung <<Ryback.Hung@quantatw.com>
+M:	Bryant Ou <Bryant.Ou@quantatw.com>
+S:	Supported
+F:	src/soc/intel/xeon_sp
+F:	src/vendorcode/intel/fsp/fsp2_0/skylake_sp
+F:	src/vendorcode/intel/fsp/fsp2_0/copperlake_sp
+
 ORPHANED ARM SOCS
 S:	Orphaned
 F:	src/cpu/armltd/
-- 
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