From e8c8283a267696fad92a139cdd3fe3395051b7d7 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 26 Jul 2020 17:21:57 +0200 Subject: mb/intel/kblrvp: Factor out `IoBufferOwnership` RVP11 and RVP3 set it to zero, the other two omit the setting. Tested with BUILD_TIMELESS=1, all four variants do not change. Change-Id: I6b393f0f2269f62b415456c17ba5962f46a1c5d1 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43909 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb | 1 + src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb | 1 - src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb | 1 - 3 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index 580f5b0eae..231fbadae4 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -24,6 +24,7 @@ chip soc/intel/skylake # FSP Configuration register "HeciEnabled" = "0" + register "IoBufferOwnership" = "0" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index cfb50e3e20..ad9dd3622c 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -2,7 +2,6 @@ chip soc/intel/skylake # FSP Configuration register "DspEnable" = "0" - register "IoBufferOwnership" = "0" register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "0" register "Device4Enable" = "0" diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 4c2225a8ae..ea3d814e20 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -8,7 +8,6 @@ chip soc/intel/skylake # FSP Configuration register "DspEnable" = "1" - register "IoBufferOwnership" = "0" register "PmTimerDisabled" = "1" register "Cio2Enable" = "1" register "SaImguEnable" = "1" -- cgit v1.2.3