From e5b05d61dfdd1055154cead437a98aa5db85713a Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 11 Jun 2019 19:23:55 +0200 Subject: util/superiotool: clarify usage of MISC and NANA defines Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/33402 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- util/superiotool/superiotool.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 1a10fb63ab..6e59933792 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -127,9 +127,15 @@ and print its vendor, name, ID, revision, and config port.\n" #define EOT -1 /* End Of Table */ #define NOLDN -2 /* NO LDN needed */ -#define NANA -3 /* Not Available */ +#define NANA -3 /* Not Available: + Used for registers having externally controlled + values that can change during runtime like + GPIO input value registers. */ #define RSVD -4 /* Reserved */ -#define MISC -5 /* Needs special comment in output */ +#define MISC -5 /* Needs special comment in output: + Used for registers depending on external pin straps + configuring static, but board-specific settings like + SIO base address or AMD/Intel power seqencing type. */ #define MAXLDN 0x14 /* Biggest LDN */ #define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */ #define MAXNUMIDX 170 /* Maximum number of indices */ -- cgit v1.2.3