From e1b079fdf67ee4269c0b46c341e17cb7170db787 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 21 Oct 2024 14:02:55 +0000 Subject: mb/google/fatcat: Ensure RW_SECTION_B starts at 16MB boundary This patch updates the flash map layout to guarantee that the RW_SECTION_B section starts at a 16MB boundary. TEST=Successfully builds google/fatcat. Change-Id: I74ea21a8a4107d438bc03a0da182ea7e991e74bc Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/84821 Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N --- src/mainboard/google/fatcat/chromeos.fmd | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mainboard/google/fatcat/chromeos.fmd b/src/mainboard/google/fatcat/chromeos.fmd index 61dd8cc30c..4b42403e7d 100644 --- a/src/mainboard/google/fatcat/chromeos.fmd +++ b/src/mainboard/google/fatcat/chromeos.fmd @@ -9,6 +9,15 @@ FLASH 32M { FW_MAIN_A(CBFS) RW_FWID_A 64 } + # This section starts at the 16M boundary in SPI flash. + # PTL does not support a region crossing this boundary, + # because the SPI flash is memory-mapped into two non- + # contiguous windows. + RW_SECTION_B 7M { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 64 + } RW_MISC 1M { UNIFIED_MRC_CACHE(PRESERVE) 128K { RECOVERY_MRC_CACHE 64K @@ -22,15 +31,6 @@ FLASH 32M { RW_VPD(PRESERVE) 8K RW_NVRAM(PRESERVE) 24K } - # This section starts at the 16M boundary in SPI flash. - # MTL does not support a region crossing this boundary, - # because the SPI flash is memory-mapped into two non- - # contiguous windows. - RW_SECTION_B 7M { - VBLOCK_B 8K - FW_MAIN_B(CBFS) - RW_FWID_B 64 - } RW_LEGACY(CBFS) 1M RW_UNUSED 3M # Make WP_RO region align with SPI vendor -- cgit v1.2.3