From e05f81a3e0e51e7e1d8b907399a6ac887cee37fe Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 15 Jan 2021 22:31:33 +0200 Subject: soc/intel/quark: Add pwrs in MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For the time being every soc/intel selects ACPI_SOC_NVS and pwrs is a required field for the common initialisation implementation of followup work. Change-Id: I4a0c7eb35f0646898e49fad15c6448607c398731 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49493 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/quark/include/soc/nvs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/quark/include/soc/nvs.h b/src/soc/intel/quark/include/soc/nvs.h index 904607ff35..fee0e42a7d 100644 --- a/src/soc/intel/quark/include/soc/nvs.h +++ b/src/soc/intel/quark/include/soc/nvs.h @@ -7,6 +7,7 @@ struct __packed global_nvs { uint32_t cbmc; /* 0x00 - 0x03 - coreboot Memory Console */ + uint8_t pwrs; /* 0x4 - Power state (AC = 1) */ }; #endif /* SOC_INTEL_QUARK_NVS_H */ -- cgit v1.2.3