From dea4e0fe683faef0becac4930769693422da5a85 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 22 Sep 2021 20:05:53 +0200 Subject: soc/amd/common/blocks/include: rename gpio_banks.h to gpio.h This brings the AMD SoC GPIO code in line with the Intel SoC code and removes the not really needed suffix. Signed-off-by: Felix Held Change-Id: Ie2dbec81dfe503869beb2872b01a7475e2b88b33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57842 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/mainboard/google/guybrush/ec.c | 2 +- .../baseboard/include/baseboard/variants.h | 2 +- src/mainboard/google/guybrush/verstage.c | 2 +- src/mainboard/google/mancomb/ec.c | 2 +- .../baseboard/include/baseboard/variants.h | 2 +- src/mainboard/google/mancomb/verstage.c | 2 +- src/mainboard/google/zork/mainboard.c | 2 +- src/mainboard/google/zork/verstage.c | 2 +- src/mainboard/pcengines/apu2/romstage.c | 2 +- src/soc/amd/cezanne/fch.c | 2 +- src/soc/amd/cezanne/gpio.c | 2 +- src/soc/amd/cezanne/include/soc/gpio.h | 2 +- src/soc/amd/cezanne/uart.c | 2 +- src/soc/amd/cezanne/xhci.c | 2 +- src/soc/amd/common/block/gpio/gpio.c | 2 +- src/soc/amd/common/block/i2c/i2c.c | 2 +- src/soc/amd/common/block/include/amdblocks/acpi.h | 2 +- src/soc/amd/common/block/include/amdblocks/gpio.h | 98 ++++++++++++++++++++++ .../common/block/include/amdblocks/gpio_banks.h | 98 ---------------------- src/soc/amd/common/block/include/amdblocks/i2c.h | 2 +- src/soc/amd/common/block/pm/chipset_state.c | 2 +- src/soc/amd/picasso/fch.c | 2 +- src/soc/amd/picasso/gpio.c | 2 +- src/soc/amd/picasso/include/soc/gpio.h | 2 +- src/soc/amd/picasso/uart.c | 2 +- src/soc/amd/picasso/xhci.c | 2 +- src/soc/amd/stoneyridge/gpio.c | 2 +- src/soc/amd/stoneyridge/include/soc/gpio.h | 2 +- src/southbridge/amd/pi/hudson/soc/gpio.h | 2 +- 29 files changed, 125 insertions(+), 125 deletions(-) create mode 100644 src/soc/amd/common/block/include/amdblocks/gpio.h delete mode 100644 src/soc/amd/common/block/include/amdblocks/gpio_banks.h diff --git a/src/mainboard/google/guybrush/ec.c b/src/mainboard/google/guybrush/ec.c index 67fdda1428..f62ca2027c 100644 --- a/src/mainboard/google/guybrush/ec.c +++ b/src/mainboard/google/guybrush/ec.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include +#include #include #include #include diff --git a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h index b9a70885ed..aab905bad9 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h @@ -3,7 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ -#include +#include #include #define WLAN_DEVFN PCIE_GPP_2_0_DEVFN diff --git a/src/mainboard/google/guybrush/verstage.c b/src/mainboard/google/guybrush/verstage.c index e15cc33195..aaaaf038de 100644 --- a/src/mainboard/google/guybrush/verstage.c +++ b/src/mainboard/google/guybrush/verstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include +#include #include #include #include diff --git a/src/mainboard/google/mancomb/ec.c b/src/mainboard/google/mancomb/ec.c index 67fdda1428..f62ca2027c 100644 --- a/src/mainboard/google/mancomb/ec.c +++ b/src/mainboard/google/mancomb/ec.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include +#include #include #include #include diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h index dccaed0e2c..632849d394 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h @@ -3,7 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ -#include +#include /* * This function provides base GPIO configuration table. It is typically provided by diff --git a/src/mainboard/google/mancomb/verstage.c b/src/mainboard/google/mancomb/verstage.c index 0e90231532..d2d9277405 100644 --- a/src/mainboard/google/mancomb/verstage.c +++ b/src/mainboard/google/mancomb/verstage.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include +#include #include #include diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index 6b51d52408..ea292f163e 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/mainboard/google/zork/verstage.c b/src/mainboard/google/zork/verstage.c index 0c7a04f9a7..e1277f4d14 100644 --- a/src/mainboard/google/zork/verstage.c +++ b/src/mainboard/google/zork/verstage.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include +#include #include #include diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 4c142d011a..2509031f3e 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -2,7 +2,7 @@ #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/cezanne/fch.c b/src/soc/amd/cezanne/fch.c index f39eeb6f28..80ce9466ec 100644 --- a/src/soc/amd/cezanne/fch.c +++ b/src/soc/amd/cezanne/fch.c @@ -3,7 +3,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/cezanne/gpio.c b/src/soc/amd/cezanne/gpio.c index f2a59e0497..8ac2870dee 100644 --- a/src/soc/amd/cezanne/gpio.c +++ b/src/soc/amd/cezanne/gpio.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +#include #include #include diff --git a/src/soc/amd/cezanne/include/soc/gpio.h b/src/soc/amd/cezanne/include/soc/gpio.h index d12d7b5a87..904c3fcc8d 100644 --- a/src/soc/amd/cezanne/include/soc/gpio.h +++ b/src/soc/amd/cezanne/include/soc/gpio.h @@ -8,7 +8,7 @@ #ifndef __ACPI__ #include -#include +#include #endif /* !__ACPI__ */ #include diff --git a/src/soc/amd/cezanne/uart.c b/src/soc/amd/cezanne/uart.c index 5aca5a23b8..e5f2e4edbb 100644 --- a/src/soc/amd/cezanne/uart.c +++ b/src/soc/amd/cezanne/uart.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include +#include #include #include #include diff --git a/src/soc/amd/cezanne/xhci.c b/src/soc/amd/cezanne/xhci.c index a77830c7b0..f599007b17 100644 --- a/src/soc/amd/cezanne/xhci.c +++ b/src/soc/amd/cezanne/xhci.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +#include #include #include #include diff --git a/src/soc/amd/common/block/gpio/gpio.c b/src/soc/amd/common/block/gpio/gpio.c index 263757988a..1141846842 100644 --- a/src/soc/amd/common/block/gpio/gpio.c +++ b/src/soc/amd/common/block/gpio/gpio.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/common/block/i2c/i2c.c b/src/soc/amd/common/block/i2c/i2c.c index bba3de7287..892c83e91f 100644 --- a/src/soc/amd/common/block/i2c/i2c.c +++ b/src/soc/amd/common/block/i2c/i2c.c @@ -3,7 +3,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h index f0ba2acac5..550b7d7619 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpi.h +++ b/src/soc/amd/common/block/include/amdblocks/acpi.h @@ -4,7 +4,7 @@ #define AMD_BLOCK_ACPI_H #include -#include +#include #include /* ACPI MMIO registers 0xfed80800 */ diff --git a/src/soc/amd/common/block/include/amdblocks/gpio.h b/src/soc/amd/common/block/include/amdblocks/gpio.h new file mode 100644 index 0000000000..21b73f775b --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/gpio.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_GPIO_BANKS_H +#define AMD_BLOCK_GPIO_BANKS_H + +#include +#include "gpio_defs.h" + +typedef uint32_t gpio_t; + +struct soc_amd_gpio { + gpio_t gpio; + uint8_t function; + uint32_t control; + uint32_t flags; +}; + +struct soc_amd_gpio_register_save { + uint32_t control_value; + uint8_t mux_value; +}; + +struct soc_amd_event { + gpio_t gpio; + uint8_t event; +}; + +struct gpio_wake_state { + uint32_t control_switch; + uint32_t wake_stat[2]; + /* Number of wake_gpio with a valid setting. */ + uint32_t num_valid_wake_gpios; + /* GPIO index number that caused a wake. */ + gpio_t wake_gpios[16]; +}; + +/* Fill gpio_wake_state object for future event reporting. */ +void gpio_fill_wake_state(struct gpio_wake_state *state); +/* Add gpio events to the eventlog. */ +void gpio_add_events(void); + +static inline bool is_gpio_event_level_triggered(uint32_t flags) +{ + return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_LEVEL; +} + +static inline bool is_gpio_event_edge_triggered(uint32_t flags) +{ + return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_EDGE; +} + +static inline bool is_gpio_event_active_high(uint32_t flags) +{ + return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_HIGH; +} + +static inline bool is_gpio_event_active_low(uint32_t flags) +{ + return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_LOW; +} + +/* + * gpio_configure_pads_with_override accepts as input two GPIO tables: + * 1. Base config + * 2. Override config + * + * This function configures raw pads in base config and applies override in + * override config if any. Thus, for every GPIO_x in base config, this function + * looks up the GPIO in override config and if it is present there, then applies + * the configuration from override config. GPIOs that are only specified in the + * override, but not in the base configuration, will be ignored. + */ +void gpio_configure_pads_with_override(const struct soc_amd_gpio *base_cfg, + size_t base_num_pads, + const struct soc_amd_gpio *override_cfg, + size_t override_num_pads); + +/* Get the address of the control register of a particular pin */ +uintptr_t gpio_get_address(gpio_t gpio_num); + +/** + * @brief program a particular set of GPIO + * + * @param gpio_list_ptr = pointer to array of gpio configurations + * @param size = number of entries in array + * + * @return none + */ +void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size); +/* Return the interrupt status and clear if set. */ +int gpio_interrupt_status(gpio_t gpio); +/* Implemented by soc, provides table of available GPIO mapping to Gevents */ +void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items); + +void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); +void gpio_restore_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); + +#endif /* AMD_BLOCK_GPIO_BANKS_H */ diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h deleted file mode 100644 index 21b73f775b..0000000000 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_BLOCK_GPIO_BANKS_H -#define AMD_BLOCK_GPIO_BANKS_H - -#include -#include "gpio_defs.h" - -typedef uint32_t gpio_t; - -struct soc_amd_gpio { - gpio_t gpio; - uint8_t function; - uint32_t control; - uint32_t flags; -}; - -struct soc_amd_gpio_register_save { - uint32_t control_value; - uint8_t mux_value; -}; - -struct soc_amd_event { - gpio_t gpio; - uint8_t event; -}; - -struct gpio_wake_state { - uint32_t control_switch; - uint32_t wake_stat[2]; - /* Number of wake_gpio with a valid setting. */ - uint32_t num_valid_wake_gpios; - /* GPIO index number that caused a wake. */ - gpio_t wake_gpios[16]; -}; - -/* Fill gpio_wake_state object for future event reporting. */ -void gpio_fill_wake_state(struct gpio_wake_state *state); -/* Add gpio events to the eventlog. */ -void gpio_add_events(void); - -static inline bool is_gpio_event_level_triggered(uint32_t flags) -{ - return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_LEVEL; -} - -static inline bool is_gpio_event_edge_triggered(uint32_t flags) -{ - return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_EDGE; -} - -static inline bool is_gpio_event_active_high(uint32_t flags) -{ - return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_HIGH; -} - -static inline bool is_gpio_event_active_low(uint32_t flags) -{ - return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_LOW; -} - -/* - * gpio_configure_pads_with_override accepts as input two GPIO tables: - * 1. Base config - * 2. Override config - * - * This function configures raw pads in base config and applies override in - * override config if any. Thus, for every GPIO_x in base config, this function - * looks up the GPIO in override config and if it is present there, then applies - * the configuration from override config. GPIOs that are only specified in the - * override, but not in the base configuration, will be ignored. - */ -void gpio_configure_pads_with_override(const struct soc_amd_gpio *base_cfg, - size_t base_num_pads, - const struct soc_amd_gpio *override_cfg, - size_t override_num_pads); - -/* Get the address of the control register of a particular pin */ -uintptr_t gpio_get_address(gpio_t gpio_num); - -/** - * @brief program a particular set of GPIO - * - * @param gpio_list_ptr = pointer to array of gpio configurations - * @param size = number of entries in array - * - * @return none - */ -void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size); -/* Return the interrupt status and clear if set. */ -int gpio_interrupt_status(gpio_t gpio); -/* Implemented by soc, provides table of available GPIO mapping to Gevents */ -void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items); - -void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); -void gpio_restore_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); - -#endif /* AMD_BLOCK_GPIO_BANKS_H */ diff --git a/src/soc/amd/common/block/include/amdblocks/i2c.h b/src/soc/amd/common/block/include/amdblocks/i2c.h index 22a408ec92..6660e3779c 100644 --- a/src/soc/amd/common/block/include/amdblocks/i2c.h +++ b/src/soc/amd/common/block/include/amdblocks/i2c.h @@ -3,7 +3,7 @@ #ifndef AMD_COMMON_BLOCK_I2C_H #define AMD_COMMON_BLOCK_I2C_H -#include +#include #include #include #include diff --git a/src/soc/amd/common/block/pm/chipset_state.c b/src/soc/amd/common/block/pm/chipset_state.c index 302ee60aba..42d1a159c4 100644 --- a/src/soc/amd/common/block/pm/chipset_state.c +++ b/src/soc/amd/common/block/pm/chipset_state.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include +#include #include #include #include diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 0798e20c04..711091c5c5 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/picasso/gpio.c b/src/soc/amd/picasso/gpio.c index fe7d14b139..65fb4d8f5b 100644 --- a/src/soc/amd/picasso/gpio.c +++ b/src/soc/amd/picasso/gpio.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +#include #include #include diff --git a/src/soc/amd/picasso/include/soc/gpio.h b/src/soc/amd/picasso/include/soc/gpio.h index b3c8140680..01a997daa8 100644 --- a/src/soc/amd/picasso/include/soc/gpio.h +++ b/src/soc/amd/picasso/include/soc/gpio.h @@ -8,7 +8,7 @@ #ifndef __ACPI__ #include -#include +#include #endif /* !__ACPI__ */ #include diff --git a/src/soc/amd/picasso/uart.c b/src/soc/amd/picasso/uart.c index 6e1fb95be0..b8532aaddf 100644 --- a/src/soc/amd/picasso/uart.c +++ b/src/soc/amd/picasso/uart.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/amd/picasso/xhci.c b/src/soc/amd/picasso/xhci.c index a7e480767e..84b3a2b82d 100644 --- a/src/soc/amd/picasso/xhci.c +++ b/src/soc/amd/picasso/xhci.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +#include #include #include #include diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index 90c23a2b4c..b16172f507 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include +#include #include #include diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index 6fefa7972b..5cd688dece 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -8,7 +8,7 @@ #ifndef __ACPI__ #include -#include +#include /* The following sections describe only the GPIOs defined for this SOC */ diff --git a/src/southbridge/amd/pi/hudson/soc/gpio.h b/src/southbridge/amd/pi/hudson/soc/gpio.h index 6069ee018d..0850fe1764 100644 --- a/src/southbridge/amd/pi/hudson/soc/gpio.h +++ b/src/southbridge/amd/pi/hudson/soc/gpio.h @@ -4,7 +4,7 @@ #define SOC_GPIO_H /* must provide gpio_t. */ -#include +#include #define SOC_GPIO_TOTAL_PINS 133 -- cgit v1.2.3