From de374e5028e06b689d3b413533bfbe63fe0ff5d6 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 29 May 2021 07:01:10 +0200 Subject: drivers/intel/fsp1_1/romstage.c: Remove MCU update On Braswell this is done in the bootblock before C code is executed. Change-Id: I72c7b821e04169ae237d8adb6a8348f06e87b047 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/55064 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Angel Pons Reviewed-by: Frans Hendriks --- src/drivers/intel/fsp1_1/romstage.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index ff0380565a..62b112a3be 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -103,10 +103,6 @@ void cache_as_ram_stage_main(FSP_INFO_HEADER *fih) timestamp_add_now(TS_START_ROMSTAGE); - /* Load microcode before RAM init */ - if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS)) - intel_update_microcode_from_cbfs(); - /* Display parameters */ if (!CONFIG(NO_MMCONF_SUPPORT)) printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n", -- cgit v1.2.3