From dc1b78130a4d656d5443ff5db393ebeaed1e8207 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 22 Apr 2017 16:36:10 -0500 Subject: soc/skylake: add ACPI method to generate USB port info Add ACPI method GPLD to generate port location data when passed visiblity info. Will be used by _PLD method in board-specific USB .asl files. Change-Id: I14ba3cea821e103208426e9fcaa0833d84157ff8 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/19975 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/intel/skylake/acpi/xhci.asl | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/src/soc/intel/skylake/acpi/xhci.asl b/src/soc/intel/skylake/acpi/xhci.asl index 4c6625eb01..08f35bcf28 100644 --- a/src/soc/intel/skylake/acpi/xhci.asl +++ b/src/soc/intel/skylake/acpi/xhci.asl @@ -223,6 +223,26 @@ Device (XHCI) { Name (_ADR, Zero) + // GPLD: Generate Port Location Data (PLD) + Method (GPLD, 1, Serialized) + { + + Name (PCKG, Package (0x01) + { + Buffer (0x10) {} + }) + + // REV: Revision 0x02 for ACPI 5.0 + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (0x02, REV) + + // VISI: Port visibility to user per port + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) + + Return (PCKG) + } + /* USB2 */ Device (HS01) { Name (_ADR, 1) } Device (HS02) { Name (_ADR, 2) } -- cgit v1.2.3