From d510b60f5b4eee6c165039be4acbe89ff25d8a4a Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 11 Feb 2021 10:01:27 +0000 Subject: Revert "mb/intel/shadowmountain: Add the ASL code" This reverts commit 2151f7561d728a9280d69d20ef56a9fe44db7cb1. Reason for revert: It depends on the shadowmountain ramstage patch. Error on the builder: IASL /cb-build/coreboot.0/default/INTEL_SHADOWMOUNTAIN/dsdt.aml src/mainboard/intel/shadowmountain/dsdt.asl:4:10: fatal error: baseboard/ec.h: No such file or directory #include ^~~~~~~~~~~~~~~~ compilation terminated. Change-Id: I9fa5e8cc2ad485bf82bfbda151bc46d26faef7ab Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/c/coreboot/+/50055 Tested-by: build bot (Jenkins) Reviewed-by: Christian Walter Reviewed-by: Subrata Banik Reviewed-by: Angel Pons --- src/mainboard/intel/shadowmountain/dsdt.asl | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/src/mainboard/intel/shadowmountain/dsdt.asl b/src/mainboard/intel/shadowmountain/dsdt.asl index f94ad378c9..c8dc9ee2c3 100644 --- a/src/mainboard/intel/shadowmountain/dsdt.asl +++ b/src/mainboard/intel/shadowmountain/dsdt.asl @@ -1,8 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include -#include DefinitionBlock( "dsdt.aml", @@ -14,31 +12,4 @@ DefinitionBlock( ) { #include - #include - - /* global NVS and variables */ - #include - - /* CPU */ - #include - - Scope (\_SB) { - Device (PCI0) - { - #include - #include - #include - } - } - - /* Chrome OS Embedded Controller */ - Scope (\_SB.PCI0.LPCB) - { - // ACPI code for EC SuperIO functions - #include - // ACPI code for EC functions - #include - } - - #include } -- cgit v1.2.3