From d41ad724cd2430558e4ecbb5e90b769555b68c34 Mon Sep 17 00:00:00 2001 From: Jett Rink Date: Mon, 10 Jun 2024 09:31:14 -0600 Subject: tpm: Add Ti50 OpenTitan DID_VID The OpenTitan HW implements the same firmware interface as the Ti50 H1D3C hardware variant; it just has a different DID_VID. Allow this new DID_VID to be recognized correctly. BUG=b:324940153 Change-Id: Iaacf6d88bc6067948756c465aac1cd8b24ecae1f Signed-off-by: Jett Rink Reviewed-on: https://review.coreboot.org/c/coreboot/+/83033 Reviewed-by: Karthik Ramasubramanian Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/drivers/i2c/tpm/cr50.c | 6 ++++-- src/drivers/spi/tpm/tpm.c | 1 + src/drivers/tpm/cr50.c | 3 ++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 3bc98c370a..5f5ca66d5f 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -34,7 +34,8 @@ #define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */ #define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ #define CR50_DID_VID 0x00281ae0L -#define TI50_DID_VID 0x504a6666L +#define TI50_DT_DID_VID 0x504a6666L +#define TI50_OT_DID_VID 0x50666666L struct tpm_inf_dev { int bus; @@ -449,7 +450,8 @@ static tpm_result_t cr50_i2c_probe(uint32_t *did_vid) rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); /* Exit once DID and VID verified */ - if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DID_VID)) { + if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DT_DID_VID || + *did_vid == TI50_OT_DID_VID)) { printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); return TPM_SUCCESS; } diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c index d9c3a6dc1c..f74dfffe01 100644 --- a/src/drivers/spi/tpm/tpm.c +++ b/src/drivers/spi/tpm/tpm.c @@ -391,6 +391,7 @@ static enum cb_err tpm2_claim_locality(void) static const uint32_t supported_did_vids[] = { 0x00281ae0, /* H1 based Cr50 security chip. */ 0x504a6666, /* H1D3C based Ti50 security chip. */ + 0x50666666, /* OpenTitan based Ti50 security chip. */ 0x0000104a /* ST33HTPH2E32 */ }; diff --git a/src/drivers/tpm/cr50.c b/src/drivers/tpm/cr50.c index 5618b9db5d..d77ad48d8f 100644 --- a/src/drivers/tpm/cr50.c +++ b/src/drivers/tpm/cr50.c @@ -8,7 +8,8 @@ #include #define CR50_DID_VID 0x00281ae0L -#define TI50_DID_VID 0x504a6666L +#define TI50_DT_DID_VID 0x504a6666L +#define TI50_OT_DID_VID 0x50666666L #define CR50_BOARD_CFG_LOCKBIT_MASK 0x80000000U #define CR50_BOARD_CFG_FEATUREBITS_MASK 0x3FFFFFFFU -- cgit v1.2.3