From d2794cea1291f7f6e35b426b8b66cbb08da6d532 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 17 Oct 2021 12:59:43 +0200 Subject: acpi/acpigen: Constify CST functions' pointers The `acpigen_write_CST_package` and `acpigen_write_CST_package_entry` functions don't modify the provided C-state information. So, make the pointer parameters read-only to enforce this. Also constify arguments where possible. Change-Id: I9e18d82ee6c16e4435b8fad6d467e58c33194cf4 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/58391 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Felix Held --- src/acpi/acpigen.c | 4 ++-- src/include/acpi/acpigen.h | 4 ++-- src/soc/amd/cezanne/acpi.c | 2 +- src/soc/amd/picasso/acpi.c | 2 +- src/soc/intel/baytrail/acpi.c | 2 +- src/soc/intel/braswell/acpi.c | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c index c8f14378c9..e0892e654f 100644 --- a/src/acpi/acpigen.c +++ b/src/acpi/acpigen.c @@ -994,7 +994,7 @@ void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype) acpigen_pop_len(); } -void acpigen_write_CST_package_entry(acpi_cstate_t *cstate) +void acpigen_write_CST_package_entry(const acpi_cstate_t *cstate) { acpigen_write_package(4); acpigen_write_register_resource(&cstate->resource); @@ -1004,7 +1004,7 @@ void acpigen_write_CST_package_entry(acpi_cstate_t *cstate) acpigen_pop_len(); } -void acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries) +void acpigen_write_CST_package(const acpi_cstate_t *cstate, int nentries) { int i; acpigen_write_name("_CST"); diff --git a/src/include/acpi/acpigen.h b/src/include/acpi/acpigen.h index c019130e28..cf14c7f39d 100644 --- a/src/include/acpi/acpigen.h +++ b/src/include/acpi/acpigen.h @@ -357,8 +357,8 @@ void acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, void acpigen_write_pss_object(const struct acpi_sw_pstate *pstate_values, size_t nentries); typedef enum { SW_ALL = 0xfc, SW_ANY = 0xfd, HW_ALL = 0xfe } PSD_coord; void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype); -void acpigen_write_CST_package_entry(acpi_cstate_t *cstate); -void acpigen_write_CST_package(acpi_cstate_t *entry, int nentries); +void acpigen_write_CST_package_entry(const acpi_cstate_t *cstate); +void acpigen_write_CST_package(const acpi_cstate_t *entry, int nentries); typedef enum { CSD_HW_ALL = 0xfe } CSD_coord; void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype, u32 index); diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 3b3a88befe..d390ca4f22 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -279,7 +279,7 @@ void generate_cpu_entries(const struct device *device) .addrl = PS_STS_REG, }; - acpi_cstate_t cstate_info[] = { + const acpi_cstate_t cstate_info[] = { [0] = { .ctype = 1, .latency = 1, diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 99c1648f8a..c0808d9f2e 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -289,7 +289,7 @@ void generate_cpu_entries(const struct device *device) .addrl = PS_STS_REG, }; - acpi_cstate_t cstate_info[] = { + const acpi_cstate_t cstate_info[] = { [0] = { .ctype = 1, .latency = 1, diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index e6c5abfcd3..0f9768793e 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -28,7 +28,7 @@ } /* C-state map without S0ix */ -static acpi_cstate_t cstate_map[] = { +static const acpi_cstate_t cstate_map[] = { { /* C1 */ .ctype = 1, /* ACPI C1 */ diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index d37799c92c..85e70276e4 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -36,7 +36,7 @@ } /* C-state map without S0ix */ -static acpi_cstate_t cstate_map[] = { +static const acpi_cstate_t cstate_map[] = { { /* C1 */ .ctype = 1, /* ACPI C1 */ -- cgit v1.2.3