From d0701c96f20d4b3d04c42c13b1e015d6aa27f1d4 Mon Sep 17 00:00:00 2001 From: Benjamin Doron Date: Mon, 7 Dec 2020 22:56:47 +0000 Subject: soc/intel/skylake: Enable CHAP device depending on devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that CHAP device is declared in chipset devicetree, hook it up to devicetree configuration. Change-Id: Icc51f7b9cda32d5058dce958e386921b6d3d8ffb Signed-off-by: Benjamin Doron Reviewed-on: https://review.coreboot.org/c/coreboot/+/48323 Reviewed-by: Michael Niewöhner Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/chip.c | 3 +++ src/soc/intel/skylake/include/soc/pci_devs.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index ef16f388d7..2707353225 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -247,6 +247,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) dev = pcidev_path_on_root(SA_DEVFN_IMGU); params->SaImguEnable = dev && dev->enabled; + dev = pcidev_path_on_root(SA_DEVFN_CHAP); + tconfig->ChapDeviceEnable = dev && dev->enabled; + dev = pcidev_path_on_root(PCH_DEVFN_CSE_3); params->Heci3Enabled = dev && dev->enabled; diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 319a12b53a..661ed5cd65 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -42,6 +42,10 @@ #define SA_DEVFN_IMGU PCI_DEVFN(SA_DEV_SLOT_IMGU, 0) #define SA_DEV_IMGU PCI_DEV(0, SA_DEV_SLOT_IMGU, 0) +#define SA_DEV_SLOT_CHAP 0x07 +#define SA_DEVFN_CHAP PCI_DEVFN(SA_DEV_SLOT_CHAP, 0) +#define SA_DEV_CHAP PCI_DEV(0, SA_DEV_SLOT_CHAP, 0) + #define SA_DEV_SLOT_GMM 0x08 #define SA_DEVFN_GMM PCI_DEVFN(SA_DEV_SLOT_GMM, 0) #define SA_DEV_GMM PCI_DEV(0, SA_DEV_SLOT_GMM, 0) -- cgit v1.2.3