From cf7b4989083cb3fd1adf34dc5e07d4ac253e8f85 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Wed, 23 Apr 2014 21:52:25 +1000 Subject: superio/fintek/*: Factor out generic romstage component The romstage of Fintek Super I/O's is identical, leading to replication of essentially the same code prone to bitrot. Herein we consolidate the early pre-ram UART initialisation code into fintek/common, rather we leave the exceptions to be implemented under model/. More precisely we provide a well documented version of early_serial.c under fintek/common and select by way of Kconfig as a generic romstage component to Super I/O support. We leave future Super I/O's the option to implement `non-standard` initialisation code should such a (unlikely) need araise. A primary advantage is that new support for romstage serial is now trival to add. We also provide some Kconfig documentation while here. Change-Id: I3c62561558a62ece944a167ba302fb7076bba001 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5575 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/amd/persimmon/romstage.c | 3 +- src/mainboard/amd/south_station/romstage.c | 3 +- src/mainboard/iei/kino-780am2-fam10/romstage.c | 3 +- src/mainboard/jetway/j7f2/romstage.c | 3 +- src/mainboard/jetway/nf81-t56n-lf/romstage.c | 5 +- src/mainboard/jetway/pa78vm5/romstage.c | 3 +- src/mainboard/via/epia-m850/romstage.c | 5 +- src/superio/fintek/Kconfig | 19 +++++++ src/superio/fintek/Makefile.inc | 3 ++ src/superio/fintek/common/early_serial.c | 72 ++++++++++++++++++++++++++ src/superio/fintek/common/fintek.h | 29 +++++++++++ src/superio/fintek/f71805f/Makefile.inc | 1 - src/superio/fintek/f71805f/early_serial.c | 48 ----------------- src/superio/fintek/f71805f/f71805f.h | 2 - src/superio/fintek/f71859/Makefile.inc | 1 - src/superio/fintek/f71859/early_serial.c | 48 ----------------- src/superio/fintek/f71859/f71859.h | 2 - src/superio/fintek/f71863fg/Makefile.inc | 1 - src/superio/fintek/f71863fg/early_serial.c | 48 ----------------- src/superio/fintek/f71863fg/f71863fg.h | 2 - src/superio/fintek/f71869ad/Makefile.inc | 1 - src/superio/fintek/f71869ad/early_serial.c | 68 ------------------------ src/superio/fintek/f71869ad/f71869ad.h | 2 - src/superio/fintek/f71872/Makefile.inc | 1 - src/superio/fintek/f71872/early_serial.c | 48 ----------------- src/superio/fintek/f71872/f71872.h | 2 - src/superio/fintek/f71889/Makefile.inc | 1 - src/superio/fintek/f71889/early_serial.c | 46 ---------------- src/superio/fintek/f71889/f71889.h | 2 - src/superio/fintek/f81865f/Makefile.inc | 1 - src/superio/fintek/f81865f/early_serial.c | 48 ----------------- src/superio/fintek/f81865f/f81865f.h | 2 - 32 files changed, 139 insertions(+), 384 deletions(-) create mode 100644 src/superio/fintek/common/early_serial.c create mode 100644 src/superio/fintek/common/fintek.h delete mode 100644 src/superio/fintek/f71805f/early_serial.c delete mode 100644 src/superio/fintek/f71859/early_serial.c delete mode 100644 src/superio/fintek/f71863fg/early_serial.c delete mode 100644 src/superio/fintek/f71869ad/early_serial.c delete mode 100644 src/superio/fintek/f71872/early_serial.c delete mode 100644 src/superio/fintek/f71889/early_serial.c delete mode 100644 src/superio/fintek/f81865f/early_serial.c diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index e082f60195..81804a93ff 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -31,6 +31,7 @@ #include #include "agesawrapper.h" #include "cpu/x86/bist.h" +#include #include #include "cpu/x86/lapic.h" #include "drivers/pc80/i8254.c" @@ -70,7 +71,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb_Poweron_Init(); post_code(0x31); - f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); } diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c index 5614f88b57..5e70ecc8ed 100644 --- a/src/mainboard/amd/south_station/romstage.c +++ b/src/mainboard/amd/south_station/romstage.c @@ -32,6 +32,7 @@ #include #include "agesawrapper.h" #include "cpu/x86/bist.h" +#include #include #include "cpu/x86/lapic.h" #include @@ -58,7 +59,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb_Poweron_Init(); post_code(0x31); - f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); } diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 299ba619a5..612ff1a20b 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -41,6 +41,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include #include "cpu/x86/bist.h" +#include #include #include #include "northbridge/amd/amdfam10/setup_resource_map.c" @@ -97,7 +98,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_rs780_dev8(); sb7xx_51xx_lpc_init(); - f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c index 37c3ab4186..845561026d 100644 --- a/src/mainboard/jetway/j7f2/romstage.c +++ b/src/mainboard/jetway/j7f2/romstage.c @@ -31,6 +31,7 @@ #include "drivers/pc80/udelay_io.c" #include "lib/delay.c" #include "southbridge/via/vt8237r/early_smbus.c" +#include #include #include #include @@ -90,7 +91,7 @@ void main(unsigned long bist) /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); - f71805f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_smbus(); diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 3406edfde9..3e962d3274 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -40,7 +40,8 @@ #include #include #include -#include "superio/fintek/f71869ad/f71869ad.h" +#include +#include /* FIXME: should not include .c files */ #include "drivers/pc80/i8254.c" @@ -75,7 +76,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb_Poweron_Init(); post_code(0x31); - f71869ad_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); } diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index c082a67646..044d0d8b0f 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -42,6 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include #include "cpu/x86/bist.h" +#include #include #include #include "northbridge/amd/amdfam10/setup_resource_map.c" @@ -102,7 +103,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_rs780_dev8(); sb7xx_51xx_lpc_init(); - f71863fg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 22f5ed6875..9368028db6 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -36,9 +36,10 @@ #include "northbridge/via/vx900/early_vx900.h" #include "northbridge/via/vx900/raminit.h" +#include #include -#define SERIAL_DEV PNP_DEV(0x4e, 0x10) +#define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1) /* cache_as_ram.inc jumps to here. */ void main(unsigned long bist) @@ -52,7 +53,7 @@ void main(unsigned long bist) vx900_enable_pci_config_space(); /* Serial console is easy to take care of */ - f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); print_debug("Console initialized. \n"); diff --git a/src/superio/fintek/Kconfig b/src/superio/fintek/Kconfig index 938494adbe..f5778980cd 100644 --- a/src/superio/fintek/Kconfig +++ b/src/superio/fintek/Kconfig @@ -2,6 +2,7 @@ ## This file is part of the coreboot project. ## ## Copyright (C) 2009 Ronald G. Minnich +## Copyright (C) 2014 Edward O'Callaghan ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -17,17 +18,35 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +# Generic Fintek romstage driver - Just enough UART initialisation code for +# romstage. +config SUPERIO_FINTEK_COMMON_ROMSTAGE + bool + config SUPERIO_FINTEK_F71805F bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F71859 bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F71863FG bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F71869AD bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F71872 bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F71889 bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE + config SUPERIO_FINTEK_F81865F bool + select SUPERIO_FINTEK_COMMON_ROMSTAGE diff --git a/src/superio/fintek/Makefile.inc b/src/superio/fintek/Makefile.inc index 541a893fd2..1b11336360 100644 --- a/src/superio/fintek/Makefile.inc +++ b/src/superio/fintek/Makefile.inc @@ -17,6 +17,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +## include generic fintek pre-ram stage driver +romstage-$(CONFIG_SUPERIO_FINTEK_COMMON_ROMSTAGE) += common/early_serial.c + subdirs-y += f71805f subdirs-y += f71859 subdirs-y += f71863fg diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c new file mode 100644 index 0000000000..d74b786d50 --- /dev/null +++ b/src/superio/fintek/common/early_serial.c @@ -0,0 +1,72 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Edward O'Callaghan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * A generic romstage (pre-ram) driver for Fintek variant Super I/O chips. + * + * The following is derived directly from the vendor Fintek's data-sheets: + * + * To toggle between `configuration mode` and `normal operation mode` as to + * manipulation the various LDN's in Fintek Super I/O's we are required to pass + * magic numbers `passwords keys`. + * + * FINTEK_ENTRY_KEY := enable configuration : 0x87 + * FINTEK_EXIT_KEY := disable configuration : 0xAA + * + * To modify a LDN's configuration register, we use the index port to select + * the index of the LDN and then writing to the data port to alter the + * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a + * user modified pair is 0x2E, 0x2F respectively. + * + */ + +#include +#include +#include +#include "fintek.h" + +#define FINTEK_ENTRY_KEY 0x87 +#define FINTEK_EXIT_KEY 0xAA + +/* Enable configuration: pass entry key '0x87' into index port dev. */ +static void pnp_enter_conf_state(device_t dev) +{ + u16 port = dev >> 8; + outb(FINTEK_ENTRY_KEY, port); + outb(FINTEK_ENTRY_KEY, port); +} + +/* Disable configuration: pass exit key '0xAA' into index port dev. */ +static void pnp_exit_conf_state(device_t dev) +{ + u16 port = dev >> 8; + outb(FINTEK_EXIT_KEY, port); +} + +/* Bring up early serial debugging output before the RAM is initialized. */ +void fintek_enable_serial(device_t dev, u16 iobase) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_conf_state(dev); +} diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h new file mode 100644 index 0000000000..a08cf92264 --- /dev/null +++ b/src/superio/fintek/common/fintek.h @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Edward O'Callaghan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_FINTEK_COMMON_ROMSTAGE_H +#define SUPERIO_FINTEK_COMMON_ROMSTAGE_H + +#include +#include + +void fintek_enable_serial(device_t dev, u16 iobase); + +#endif /* SUPERIO_FINTEK_COMMON_ROMSTAGE_H */ diff --git a/src/superio/fintek/f71805f/Makefile.inc b/src/superio/fintek/f71805f/Makefile.inc index 22c01e059c..4a137992f7 100644 --- a/src/superio/fintek/f71805f/Makefile.inc +++ b/src/superio/fintek/f71805f/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71805F) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.c diff --git a/src/superio/fintek/f71805f/early_serial.c b/src/superio/fintek/f71805f/early_serial.c deleted file mode 100644 index b823a430e5..0000000000 --- a/src/superio/fintek/f71805f/early_serial.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Corey Osgood - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Pre-RAM driver for the Fintek F71805F/FG Super I/O chip. */ - -#include -#include -#include "f71805f.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f71805f_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71805f/f71805f.h b/src/superio/fintek/f71805f/f71805f.h index 1033ea2de6..82f3869731 100644 --- a/src/superio/fintek/f71805f/f71805f.h +++ b/src/superio/fintek/f71805f/f71805f.h @@ -38,6 +38,4 @@ #define F71805F_GPIO 0x06 /* General Purpose I/O (GPIO) */ #define F71805F_PME 0x0a /* Power Management Events (PME) */ -void f71805f_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71805F_H */ diff --git a/src/superio/fintek/f71859/Makefile.inc b/src/superio/fintek/f71859/Makefile.inc index 885881163e..fa63a1bd58 100644 --- a/src/superio/fintek/f71859/Makefile.inc +++ b/src/superio/fintek/f71859/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71859) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71859) += superio.c diff --git a/src/superio/fintek/f71859/early_serial.c b/src/superio/fintek/f71859/early_serial.c deleted file mode 100644 index cb0d3dec02..0000000000 --- a/src/superio/fintek/f71859/early_serial.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Marc Jones - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Pre-RAM driver for the Fintek F71859 Super I/O chip. */ - -#include -#include -#include "f71859.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f71859_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71859/f71859.h b/src/superio/fintek/f71859/f71859.h index ab114a4540..f0111bdc2e 100644 --- a/src/superio/fintek/f71859/f71859.h +++ b/src/superio/fintek/f71859/f71859.h @@ -24,6 +24,4 @@ /* Logical Device Numbers (LDN). */ #define F71859_SP1 0x03 /* UART1 */ -void f71859_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71859_H */ diff --git a/src/superio/fintek/f71863fg/Makefile.inc b/src/superio/fintek/f71863fg/Makefile.inc index 85ec530ccb..e48b93a3d4 100644 --- a/src/superio/fintek/f71863fg/Makefile.inc +++ b/src/superio/fintek/f71863fg/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c diff --git a/src/superio/fintek/f71863fg/early_serial.c b/src/superio/fintek/f71863fg/early_serial.c deleted file mode 100644 index 251f298c19..0000000000 --- a/src/superio/fintek/f71863fg/early_serial.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Corey Osgood - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */ - -#include -#include -#include "f71863fg.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f71863fg_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h index c29ddbe05e..a11e69f59b 100644 --- a/src/superio/fintek/f71863fg/f71863fg.h +++ b/src/superio/fintek/f71863fg/f71863fg.h @@ -33,6 +33,4 @@ #define F71863FG_SPI 0x08 /* SPI */ #define F71863FG_PME 0x0a /* Power Management Events (PME) and ACPI */ -void f71863fg_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71863FG_H */ diff --git a/src/superio/fintek/f71869ad/Makefile.inc b/src/superio/fintek/f71869ad/Makefile.inc index 12efbebeb8..117239a2bf 100644 --- a/src/superio/fintek/f71869ad/Makefile.inc +++ b/src/superio/fintek/f71869ad/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71869AD) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71869AD) += superio.c diff --git a/src/superio/fintek/f71869ad/early_serial.c b/src/superio/fintek/f71869ad/early_serial.c deleted file mode 100644 index 85184007ac..0000000000 --- a/src/superio/fintek/f71869ad/early_serial.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Edward O'Callaghan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Pre-RAM driver for the Fintek F71869AD Super I/O chip. - * - * Derived from p.34 in vendor data-sheet: - * - * - default index port : 0x4E - * - default data port : 0x4F - * - * - enable configuration : 0x87 - * - disable configuration : 0xAA - * - */ - -#include -#include -#include "f71869ad.h" - -/* - * Enable configuration: pass entry key '0x87' into index port dev. - */ -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -/* - * Disable configuration: pass exit key '0xAA' into index port dev. - */ -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -/* - * Bring up early serial debugging output before the RAM is initialized. - */ -void f71869ad_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h index 43a4397451..3aeac56b82 100644 --- a/src/superio/fintek/f71869ad/f71869ad.h +++ b/src/superio/fintek/f71869ad/f71869ad.h @@ -32,6 +32,4 @@ #define F71869AD_BSEL 0x07 /* BSEL */ #define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */ -void f71869ad_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71869AD_H */ diff --git a/src/superio/fintek/f71872/Makefile.inc b/src/superio/fintek/f71872/Makefile.inc index 58ba5d562a..ed40eb0ab5 100644 --- a/src/superio/fintek/f71872/Makefile.inc +++ b/src/superio/fintek/f71872/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71872) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71872) += superio.c diff --git a/src/superio/fintek/f71872/early_serial.c b/src/superio/fintek/f71872/early_serial.c deleted file mode 100644 index bbfc26430a..0000000000 --- a/src/superio/fintek/f71872/early_serial.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Corey Osgood - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Pre-RAM driver for the Fintek F71872F/FG Super I/O chip. */ - -#include -#include -#include "f71872.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f71872_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71872/f71872.h b/src/superio/fintek/f71872/f71872.h index fb8076248a..629d42deb8 100644 --- a/src/superio/fintek/f71872/f71872.h +++ b/src/superio/fintek/f71872/f71872.h @@ -32,6 +32,4 @@ #define F71872_VID 0x07 /* VID */ #define F71872_PM 0x0a /* ACPI/PME */ -void f71872_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71872_H */ diff --git a/src/superio/fintek/f71889/Makefile.inc b/src/superio/fintek/f71889/Makefile.inc index 986414080b..5c39860b51 100644 --- a/src/superio/fintek/f71889/Makefile.inc +++ b/src/superio/fintek/f71889/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F71889) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F71889) += superio.c diff --git a/src/superio/fintek/f71889/early_serial.c b/src/superio/fintek/f71889/early_serial.c deleted file mode 100644 index 5e11474dd6..0000000000 --- a/src/superio/fintek/f71889/early_serial.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Alec Ari - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include "f71889.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f71889_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f71889/f71889.h b/src/superio/fintek/f71889/f71889.h index 72148f4f62..e46ab99ac7 100644 --- a/src/superio/fintek/f71889/f71889.h +++ b/src/superio/fintek/f71889/f71889.h @@ -34,6 +34,4 @@ #define F71889_PME 0x0a /* Power Management Events (PME) and ACPI */ #define F71889_VREF 0x0b /* Vref */ -void f71889_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F71889_H */ diff --git a/src/superio/fintek/f81865f/Makefile.inc b/src/superio/fintek/f81865f/Makefile.inc index 8afb2860ca..1700f7c272 100644 --- a/src/superio/fintek/f81865f/Makefile.inc +++ b/src/superio/fintek/f81865f/Makefile.inc @@ -18,5 +18,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-$(CONFIG_SUPERIO_FINTEK_F81865F) += early_serial.c ramstage-$(CONFIG_SUPERIO_FINTEK_F81865F) += superio.c diff --git a/src/superio/fintek/f81865f/early_serial.c b/src/superio/fintek/f81865f/early_serial.c deleted file mode 100644 index 29b5f9d658..0000000000 --- a/src/superio/fintek/f81865f/early_serial.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Pre-RAM driver for the Fintek F81865F/FG Super I/O chip. */ - -#include -#include -#include "f81865f.h" - -static void pnp_enter_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0x87, port); - outb(0x87, port); -} - -static void pnp_exit_conf_state(device_t dev) -{ - u16 port = dev >> 8; - outb(0xaa, port); -} - -void f81865f_enable_serial(device_t dev, u16 iobase) -{ - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); -} diff --git a/src/superio/fintek/f81865f/f81865f.h b/src/superio/fintek/f81865f/f81865f.h index 99b769884d..e3c204acf7 100644 --- a/src/superio/fintek/f81865f/f81865f.h +++ b/src/superio/fintek/f81865f/f81865f.h @@ -35,6 +35,4 @@ #define F81865F_GPIO 0x06 /* General Purpose I/O (GPIO) */ #define F81865F_PME 0x0a /* Power Management Events (PME) */ -void f81865f_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_FINTEK_F81865_H */ -- cgit v1.2.3