From cf0236972d06ff02880619beb7a891a0d3011184 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Tue, 3 May 2022 12:32:17 +0200 Subject: mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetree TSN runs in SGMII mode on this mainboard. This requires setting the link speed to 1 Gbps. Change-Id: I9f1da971b4de5671d6d38be6dbc50edbbe20d157 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/64033 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 72e4b0f2da..f74b504e0d 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -101,7 +101,7 @@ chip soc/intel/elkhartlake }" # TSN GBE related UPDs - register "PchTsnGbeLinkSpeed" = "Tsn_2_5_Gbps" + register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps" register "PchTsnGbeSgmiiEnable" = "1" register "PseTsnGbeSgmiiEnable[0]" = "1" register "PseTsnGbeSgmiiEnable[1]" = "1" -- cgit v1.2.3