From ce3c77c30536649ba2a6ab81979a7fa371128c31 Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Tue, 23 May 2023 18:52:24 +0200 Subject: mb/ibm/sbp1: Set coreboot ready GPIO in BS_PAYLOAD_BOOT Set coreboot ready gpio. This gpio is used to indicate to BMC of BIOS completion. Change-Id: Iaed8bec12e593cf1687d973765b0117bdc115cb8 Signed-off-by: Naresh Solanki Reviewed-on: https://review.coreboot.org/c/coreboot/+/76404 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/mainboard/ibm/sbp1/ramstage.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/mainboard/ibm/sbp1/ramstage.c b/src/mainboard/ibm/sbp1/ramstage.c index 11d0a8b6d3..63481aa123 100644 --- a/src/mainboard/ibm/sbp1/ramstage.c +++ b/src/mainboard/ibm/sbp1/ramstage.c @@ -3,9 +3,19 @@ #include #include "include/spr_sbp1_gpio.h" +#include void mainboard_silicon_init_params(FSPS_UPD *params) { /* configure Emmitsburg PCH GPIO controller after FSP-M */ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } + +static void finalize_boot(void *unused) +{ + printk(BIOS_DEBUG, "FM_BIOS_POST_CMPLT_N cleared.\n"); + /* Clear FM_BIOS_POST_CMPLT_N */ + gpio_output(GPPC_C17, 0); +} + +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); -- cgit v1.2.3