From cbe12440713f66d1f05ecc34a0dcc6b6c8c73b4e Mon Sep 17 00:00:00 2001 From: Chris Wang Date: Fri, 18 Dec 2020 14:47:06 +0800 Subject: soc/amd/picasso: Add UPDs for support eDP phy tunning adjust Add UPDs for eDP phy tunning adjust BUG=b:171269338 BRANCH=zork TEST=Build, verify the parameter pass to picasso-fsp Signed-off-by: Chris Wang Change-Id: I6df063f828447841ac9a6dba00a4aad2001f04df Reviewed-on: https://review.coreboot.org/c/coreboot/+/48731 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks --- src/vendorcode/amd/fsp/picasso/FspsUpd.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h index 491ea476de..48bd35fb11 100644 --- a/src/vendorcode/amd/fsp/picasso/FspsUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h @@ -39,7 +39,17 @@ typedef struct __packed { /** Offset 0x0124**/ uint32_t gnb_ioapic_base; /** Offset 0x0128**/ uint8_t gnb_ioapic_id; /** Offset 0x0129**/ uint8_t fch_ioapic_id; - /** Offset 0x012A**/ uint8_t UnusedUpdSpace0[38]; + /** Offset 0x012A**/ uint8_t UnusedUpdSpace0[6]; + /** Offset 0x0130**/ uint8_t unused4[16]; + /** Offset 0x0140**/ uint8_t DpPhyOverride; + /** Offset 0x0141**/ uint16_t EDpPhySel; + /** Offset 0x0143**/ uint8_t EDpVersion; + /** Offset 0x0144**/ uint8_t EDpTableSize; + /** Offset 0x0145**/ uint8_t DpVsPemphLevel; + /** Offset 0x0146**/ uint16_t MarginDeemPh; + /** Offset 0x0148**/ uint8_t Deemph6db4; + /** Offset 0x0149**/ uint8_t BoostAdj; + /** Offset 0x014A**/ uint8_t UnusedUpdSpace1[6]; /** Offset 0x0150**/ uint16_t UpdTerminator; } FSP_S_CONFIG; -- cgit v1.2.3