From c7932e267da0cba819545fa1201b6237db69091d Mon Sep 17 00:00:00 2001 From: Riku Viitanen Date: Mon, 11 Dec 2023 21:16:26 +0200 Subject: mb/hp/z220_series: Rename to snb_ivb_desktops In preparation for adding other similar boards under it as variants. Tested that z220_cmt still builds. Change-Id: I96dec173e0d97d8564bad14778333b8231684ef8 Signed-off-by: Riku Viitanen Reviewed-on: https://review.coreboot.org/c/coreboot/+/79434 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) --- src/mainboard/hp/snb_ivb_desktops/Kconfig | 64 +++++++ src/mainboard/hp/snb_ivb_desktops/Kconfig.name | 5 + src/mainboard/hp/snb_ivb_desktops/Makefile.inc | 7 + src/mainboard/hp/snb_ivb_desktops/acpi/ec.asl | 3 + src/mainboard/hp/snb_ivb_desktops/acpi/pci.asl | 35 ++++ .../hp/snb_ivb_desktops/acpi/platform.asl | 15 ++ src/mainboard/hp/snb_ivb_desktops/acpi/superio.asl | 27 +++ src/mainboard/hp/snb_ivb_desktops/board_info.txt | 7 + src/mainboard/hp/snb_ivb_desktops/cmos.default | 7 + src/mainboard/hp/snb_ivb_desktops/cmos.layout | 74 ++++++++ src/mainboard/hp/snb_ivb_desktops/data.vbt | Bin 0 -> 3777 bytes src/mainboard/hp/snb_ivb_desktops/devicetree.cb | 161 +++++++++++++++++ src/mainboard/hp/snb_ivb_desktops/dsdt.asl | 29 ++++ src/mainboard/hp/snb_ivb_desktops/early_init.c | 31 ++++ .../hp/snb_ivb_desktops/gma-mainboard.ads | 17 ++ src/mainboard/hp/snb_ivb_desktops/hda_verb.c | 32 ++++ src/mainboard/hp/snb_ivb_desktops/mainboard.c | 41 +++++ .../variants/z220_cmt_workstation/gpio.c | 177 +++++++++++++++++++ .../variants/z220_cmt_workstation/overridetree.cb | 18 ++ .../variants/z220_sff_workstation/gpio.c | 191 +++++++++++++++++++++ .../variants/z220_sff_workstation/overridetree.cb | 12 ++ src/mainboard/hp/z220_series/Kconfig | 64 ------- src/mainboard/hp/z220_series/Kconfig.name | 5 - src/mainboard/hp/z220_series/Makefile.inc | 7 - src/mainboard/hp/z220_series/acpi/ec.asl | 3 - src/mainboard/hp/z220_series/acpi/pci.asl | 35 ---- src/mainboard/hp/z220_series/acpi/platform.asl | 15 -- src/mainboard/hp/z220_series/acpi/superio.asl | 27 --- src/mainboard/hp/z220_series/board_info.txt | 7 - src/mainboard/hp/z220_series/cmos.default | 7 - src/mainboard/hp/z220_series/cmos.layout | 74 -------- src/mainboard/hp/z220_series/data.vbt | Bin 3777 -> 0 bytes src/mainboard/hp/z220_series/devicetree.cb | 161 ----------------- src/mainboard/hp/z220_series/dsdt.asl | 29 ---- src/mainboard/hp/z220_series/early_init.c | 31 ---- src/mainboard/hp/z220_series/gma-mainboard.ads | 17 -- src/mainboard/hp/z220_series/hda_verb.c | 32 ---- src/mainboard/hp/z220_series/mainboard.c | 41 ----- .../variants/z220_cmt_workstation/gpio.c | 177 ------------------- .../variants/z220_cmt_workstation/overridetree.cb | 18 -- .../variants/z220_sff_workstation/gpio.c | 191 --------------------- .../variants/z220_sff_workstation/overridetree.cb | 12 -- 42 files changed, 953 insertions(+), 953 deletions(-) create mode 100644 src/mainboard/hp/snb_ivb_desktops/Kconfig create mode 100644 src/mainboard/hp/snb_ivb_desktops/Kconfig.name create mode 100644 src/mainboard/hp/snb_ivb_desktops/Makefile.inc create mode 100644 src/mainboard/hp/snb_ivb_desktops/acpi/ec.asl create mode 100644 src/mainboard/hp/snb_ivb_desktops/acpi/pci.asl create mode 100644 src/mainboard/hp/snb_ivb_desktops/acpi/platform.asl create mode 100644 src/mainboard/hp/snb_ivb_desktops/acpi/superio.asl create mode 100644 src/mainboard/hp/snb_ivb_desktops/board_info.txt create mode 100644 src/mainboard/hp/snb_ivb_desktops/cmos.default create mode 100644 src/mainboard/hp/snb_ivb_desktops/cmos.layout create mode 100644 src/mainboard/hp/snb_ivb_desktops/data.vbt create mode 100644 src/mainboard/hp/snb_ivb_desktops/devicetree.cb create mode 100644 src/mainboard/hp/snb_ivb_desktops/dsdt.asl create mode 100644 src/mainboard/hp/snb_ivb_desktops/early_init.c create mode 100644 src/mainboard/hp/snb_ivb_desktops/gma-mainboard.ads create mode 100644 src/mainboard/hp/snb_ivb_desktops/hda_verb.c create mode 100644 src/mainboard/hp/snb_ivb_desktops/mainboard.c create mode 100644 src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/gpio.c create mode 100644 src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb create mode 100644 src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/gpio.c create mode 100644 src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb delete mode 100644 src/mainboard/hp/z220_series/Kconfig delete mode 100644 src/mainboard/hp/z220_series/Kconfig.name delete mode 100644 src/mainboard/hp/z220_series/Makefile.inc delete mode 100644 src/mainboard/hp/z220_series/acpi/ec.asl delete mode 100644 src/mainboard/hp/z220_series/acpi/pci.asl delete mode 100644 src/mainboard/hp/z220_series/acpi/platform.asl delete mode 100644 src/mainboard/hp/z220_series/acpi/superio.asl delete mode 100644 src/mainboard/hp/z220_series/board_info.txt delete mode 100644 src/mainboard/hp/z220_series/cmos.default delete mode 100644 src/mainboard/hp/z220_series/cmos.layout delete mode 100644 src/mainboard/hp/z220_series/data.vbt delete mode 100644 src/mainboard/hp/z220_series/devicetree.cb delete mode 100644 src/mainboard/hp/z220_series/dsdt.asl delete mode 100644 src/mainboard/hp/z220_series/early_init.c delete mode 100644 src/mainboard/hp/z220_series/gma-mainboard.ads delete mode 100644 src/mainboard/hp/z220_series/hda_verb.c delete mode 100644 src/mainboard/hp/z220_series/mainboard.c delete mode 100644 src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c delete mode 100644 src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb delete mode 100644 src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c delete mode 100644 src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig b/src/mainboard/hp/snb_ivb_desktops/Kconfig new file mode 100644 index 0000000000..4cbb5e22ea --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig @@ -0,0 +1,64 @@ +config BOARD_HP_SNB_IVB_DESKTOPS_COMMON + def_bool n + select BOARD_ROMSIZE_KB_16384 + select GFX_GMA_ANALOG_I2C_HDMI_B + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE + select INTEL_GMA_HAVE_VBT + select INTEL_INT15 + select MAINBOARD_HAS_LIBGFXINIT + select MAINBOARD_HAS_TPM1 + select MAINBOARD_USES_IFD_GBE_REGION + select MEMORY_MAPPED_TPM + select NORTHBRIDGE_INTEL_SANDYBRIDGE + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_BD82X6X + select SUPERIO_NUVOTON_NPCD378 + select USE_NATIVE_RAMINIT + +config BOARD_HP_Z220_CMT_WORKSTATION + select BOARD_HP_SNB_IVB_DESKTOPS_COMMON + +config BOARD_HP_Z220_SFF_WORKSTATION + select BOARD_HP_SNB_IVB_DESKTOPS_COMMON + +if BOARD_HP_SNB_IVB_DESKTOPS_COMMON + +config VBOOT + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select VBOOT_NO_BOARD_SUPPORT + select VBOOT_VBNV_FLASH + +config CBFS_SIZE + default 0x570000 + +config MAINBOARD_DIR + default "hp/snb_ivb_desktops" + +config VARIANT_DIR + default "z220_cmt_workstation" if BOARD_HP_Z220_CMT_WORKSTATION + default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION + +config MAINBOARD_PART_NUMBER + default "HP Z220 CMT Workstation" if BOARD_HP_Z220_CMT_WORKSTATION + default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION + +config OVERRIDE_DEVICETREE + default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" + +config INTEL_GMA_VBT_FILE + default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" + +config DRAM_RESET_GATE_GPIO + int + default 60 + +config USBDEBUG_HCD_INDEX + int + default 2 +endif diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig.name b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name new file mode 100644 index 0000000000..d39eb498e2 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name @@ -0,0 +1,5 @@ +config BOARD_HP_Z220_CMT_WORKSTATION + bool "Z220 CMT Workstation" + +config BOARD_HP_Z220_SFF_WORKSTATION + bool "Z220 SFF Workstation" diff --git a/src/mainboard/hp/snb_ivb_desktops/Makefile.inc b/src/mainboard/hp/snb_ivb_desktops/Makefile.inc new file mode 100644 index 0000000000..69ef08873b --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/Makefile.inc @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only + +bootblock-y += variants/$(VARIANT_DIR)/gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/snb_ivb_desktops/acpi/ec.asl b/src/mainboard/hp/snb_ivb_desktops/acpi/ec.asl new file mode 100644 index 0000000000..16990d45f4 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/acpi/ec.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: CC-PDDC */ + +/* Please update the license if adding licensable material. */ diff --git a/src/mainboard/hp/snb_ivb_desktops/acpi/pci.asl b/src/mainboard/hp/snb_ivb_desktops/acpi/pci.asl new file mode 100644 index 0000000000..ff3866a258 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/acpi/pci.asl @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +// Intel PCI to PCI bridge 0:1e.0 + +Device (PCIB) +{ + Name (_ADR, 0x001e0000) + Name (_PRW, Package() { 13, 4 }) // Power Resources for Wake + + Method (_PRT) // _PRT: PCI Interrupt Routing Table + { + If (PICM) { + Return (Package() { + Package() { 0x0000ffff, 0, 0, 0x14 }, + Package() { 0x0000ffff, 1, 0, 0x15 }, + Package() { 0x0000ffff, 2, 0, 0x16 }, + Package() { 0x0000ffff, 3, 0, 0x17 }, + Package() { 0x0001ffff, 0, 0, 0x15 }, + Package() { 0x0001ffff, 1, 0, 0x16 }, + Package() { 0x0001ffff, 2, 0, 0x17 }, + Package() { 0x0001ffff, 3, 0, 0x14 }, + }) + } + Return (Package() { + Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, + Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, + Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, + Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, + Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKF, 0 }, + Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKG, 0 }, + Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKH, 0 }, + Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKE, 0 }, + }) + } +} diff --git a/src/mainboard/hp/snb_ivb_desktops/acpi/platform.asl b/src/mainboard/hp/snb_ivb_desktops/acpi/platform.asl new file mode 100644 index 0000000000..861d3cdf71 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/acpi/platform.asl @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method(_WAK, 1, NotSerialized) +{ + // Generated by SSDT + \_SB.PCI0.LPCB.SIO0.SIOW (Arg0) + + Return(Package(){0,0}) +} + +Method(_PTS, 1, NotSerialized) +{ + // Generated by SSDT + \_SB.PCI0.LPCB.SIO0.SIOS (Arg0) +} diff --git a/src/mainboard/hp/snb_ivb_desktops/acpi/superio.asl b/src/mainboard/hp/snb_ivb_desktops/acpi/superio.asl new file mode 100644 index 0000000000..506c6d4c2d --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/acpi/superio.asl @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +Scope (\_GPE) +{ + Method (_L0D, 0, NotSerialized) + { + Notify (\_SB.PCI0.EHC1, 0x02) + Notify (\_SB.PCI0.EHC2, 0x02) + //FIXME: Add GBE device + //Notify (\_SB.PCI0.GBE, 0x02) + } + + Method (_L09, 0, NotSerialized) + { + Notify (\_SB.PCI0.RP01, 0x02) + Notify (\_SB.PCI0.RP02, 0x02) + Notify (\_SB.PCI0.RP03, 0x02) + Notify (\_SB.PCI0.RP04, 0x02) + Notify (\_SB.PCI0.RP05, 0x02) + Notify (\_SB.PCI0.RP06, 0x02) + Notify (\_SB.PCI0.RP07, 0x02) + Notify (\_SB.PCI0.RP08, 0x02) + Notify (\_SB.PCI0.PEGP, 0x02) + } +} diff --git a/src/mainboard/hp/snb_ivb_desktops/board_info.txt b/src/mainboard/hp/snb_ivb_desktops/board_info.txt new file mode 100644 index 0000000000..4d6f6f98b7 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/board_info.txt @@ -0,0 +1,7 @@ +Category: desktop +Board URL: https://support.hp.com/de-de/product/HP-Compaq-8200-Elite-Small-Form-Factor-PC/5037931 +ROM IC: MX25L6405 +ROM package: SOIC-8 +ROM socketed: no +Flashrom support: yes +Release year: 2013 diff --git a/src/mainboard/hp/snb_ivb_desktops/cmos.default b/src/mainboard/hp/snb_ivb_desktops/cmos.default new file mode 100644 index 0000000000..6d27a79c66 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/cmos.default @@ -0,0 +1,7 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Enable +nmi=Enable +sata_mode=AHCI +gfx_uma_size=32M +psu_fan_lvl=3 diff --git a/src/mainboard/hp/snb_ivb_desktops/cmos.layout b/src/mainboard/hp/snb_ivb_desktops/cmos.layout new file mode 100644 index 0000000000..1fc83b1a55 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/cmos.layout @@ -0,0 +1,74 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level +400 3 h 0 psu_fan_lvl + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail + +421 1 e 9 sata_mode + +# coreboot config options: northbridge +432 3 e 11 gfx_uma_size + +448 128 r 0 vbnv + +# SandyBridge MRC Scrambler Seed values +896 32 r 0 mrc_scrambler_seed +928 32 r 0 mrc_scrambler_seed_s3 +960 16 r 0 mrc_scrambler_seed_chk + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +9 0 AHCI +9 1 IDE +11 0 32M +11 1 64M +11 2 96M +11 3 128M +11 4 160M +11 5 192M +11 6 224M + +# ----------------------------------------------------------------- +checksums + +checksum 392 415 984 diff --git a/src/mainboard/hp/snb_ivb_desktops/data.vbt b/src/mainboard/hp/snb_ivb_desktops/data.vbt new file mode 100644 index 0000000000..c1fd6d1e13 Binary files /dev/null and b/src/mainboard/hp/snb_ivb_desktops/data.vbt differ diff --git a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb new file mode 100644 index 0000000000..f02ff76123 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb @@ -0,0 +1,161 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + register "gfx.use_spread_spectrum_clock" = "0" + register "gpu_dp_b_hotplug" = "0" + register "gpu_dp_c_hotplug" = "0" + register "gpu_dp_d_hotplug" = "0" + # BTX mainboard: Reversed mapping + register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}" + + device domain 0 on + subsystemid 0x103c 0x1791 inherit + + device ref host_bridge on end # Host bridge Host bridge + device ref peg10 on end # PCIe Bridge for discrete graphics + device ref igd on end # Internal graphics VGA controller + device ref peg60 off end # Extra x4 port on north bridge + + chip southbridge/intel/bd82x6x # Intel Series 7 PCH + register "docking_supported" = "0" + register "gen1_dec" = "0x00fc0601" + register "gen2_dec" = "0x00fc0801" + register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" + register "pcie_port_coalesce" = "true" + register "sata_interface_speed_support" = "0x3" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0x0000000f" + register "xhci_switchable_ports" = "0x0000000f" + register "xhci_overcurrent_mapping" = "0x0000000f" + + device ref xhci on end # xHCI + device ref mei1 on end # Management Engine Interface 1 + device ref mei2 off end # Management Engine Interface 2 + device ref me_ide_r off end # Management Engine IDE-R + device ref me_kt on end # Management Engine KT + device ref gbe on end # Intel Gigabit Ethernet + device ref ehci2 on end # USB2 EHCI #2 + device ref hda on end # High Definition Audio controller + device ref pcie_rp1 on end # PCIe Port #1 + device ref pcie_rp2 off end # PCIe Port #2 + device ref pcie_rp3 off end # PCIe Port #3 + device ref pcie_rp4 off end # PCIe Port #4 + device ref pcie_rp5 on end # PCIe Port #5 + device ref pcie_rp6 off end # PCIe Port #6 + device ref pcie_rp7 off end # PCIe Port #7 + device ref pcie_rp8 off end # PCIe Port #8 + device ref ehci1 on end # USB2 EHCI #1 + device ref pci_bridge on end # PCI bridge + device ref lpc on # LPC bridge PCI-LPC bridge + chip superio/common + device pnp 2e.ff on # passes SIO base addr to SSDT gen + chip superio/nuvoton/npcd378 + device pnp 2e.0 off end # Floppy + device pnp 2e.1 on # Parallel port + # global + + # serialice: Vendor writes: + irq 0x14 = 0x9c + irq 0x1c = 0xa8 + irq 0x1d = 0x08 + irq 0x22 = 0x3f + irq 0x1a = 0xb0 + # dumped from superiotool: + irq 0x1b = 0x1e + irq 0x27 = 0x08 + irq 0x2a = 0x20 + irq 0x2d = 0x01 + # parallel port + io 0x60 = 0x378 + irq 0x70 = 0x07 + drq 0x74 = 0x01 + end + device pnp 2e.2 off # COM1 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.3 on # COM2, IR + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.4 on # LED control + io 0x60 = 0x600 + # IOBASE[0h] = bit0 LED red / green + # IOBASE[0h] = bit1-4 LED PWM duty cycle + # IOBASE[1h] = bit6 SWCC + + io 0x62 = 0x610 + # IOBASE [0h] = GPES + # IOBASE [1h] = GPEE + # IOBASE [4h:7h] = 32bit upcounter at 1Mhz + # IOBASE [8h:bh] = GPS + # IOBASE [ch:fh] = GPE + end + device pnp 2e.5 on # Mouse + irq 0x70 = 0xc + end + device pnp 2e.6 on # Keyboard + io 0x60 = 0x0060 + io 0x62 = 0x0064 + irq 0x70 = 0x01 + # serialice: Vendor writes: + drq 0xf0 = 0x40 + end + device pnp 2e.7 on # WDT ? + io 0x60 = 0x620 + end + device pnp 2e.8 on # HWM + io 0x60 = 0x800 + # IOBASE[0h:feh] HWM page + # IOBASE[ffh] bit0-bit3 page selector + + drq 0xf0 = 0x20 + drq 0xf1 = 0x01 + drq 0xf2 = 0x40 + drq 0xf3 = 0x01 + + drq 0xf4 = 0x66 + drq 0xf5 = 0x67 + drq 0xf6 = 0x66 + drq 0xf7 = 0x01 + end + device pnp 2e.f on # GPIO OD ? + drq 0xf1 = 0x97 + drq 0xf2 = 0x01 + drq 0xf5 = 0x08 + drq 0xfe = 0x80 + end + device pnp 2e.15 on # BUS ? + io 0x60 = 0x0680 + io 0x62 = 0x0690 + end + device pnp 2e.1c on # Suspend Control ? + io 0x60 = 0x640 + # writing to IOBASE[5h] + # 0x0: Power off + # 0x9: Power off and bricked until CMOS battery removed + end + device pnp 2e.1e on # GPIO ? + io 0x60 = 0x660 + drq 0xf4 = 0x01 + # skip the following, as it + # looks like remapped registers + #drq 0xf5 = 0x06 + #drq 0xf6 = 0x60 + #drq 0xfe = 0x03 + end + end + end + end + chip drivers/pc80/tpm + device pnp 4e.0 on end # TPM module + end + end + device ref sata1 on end # SATA Controller 1 + device ref smbus on end # SMBus + device ref sata2 off end # SATA Controller 2 + device ref thermal off end # Thermal + end + end +end diff --git a/src/mainboard/hp/snb_ivb_desktops/dsdt.asl b/src/mainboard/hp/snb_ivb_desktops/dsdt.asl new file mode 100644 index 0000000000..57149b75b1 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/dsdt.asl @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20141018 // OEM revision +) +{ + #include + #include "acpi/platform.asl" + #include + #include + /* global NVS and variables. */ + #include + #include + + Scope (\_SB) { + Device (PCI0) + { + #include + #include + #include "acpi/pci.asl" + } + } +} diff --git a/src/mainboard/hp/snb_ivb_desktops/early_init.c b/src/mainboard/hp/snb_ivb_desktops/early_init.c new file mode 100644 index 0000000000..74a646238c --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/early_init.c @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 1, 5 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 7 }, + { 1, 0, 7 }, +}; + +void bootblock_mainboard_early_init(void) +{ + if (CONFIG(CONSOLE_SERIAL)) + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/hp/snb_ivb_desktops/gma-mainboard.ads b/src/mainboard/hp/snb_ivb_desktops/gma-mainboard.ads new file mode 100644 index 0000000000..686f7d44db --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/gma-mainboard.ads @@ -0,0 +1,17 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP2, + HDMI2, + Analog, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/hp/snb_ivb_desktops/hda_verb.c b/src/mainboard/hp/snb_ivb_desktops/hda_verb.c new file mode 100644 index 0000000000..27ab4b5275 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/hda_verb.c @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +const u32 cim_verb_data[] = { + 0x10ec0221, /* Codec Vendor / Device ID: Realtek */ + 0x103c1791, /* Subsystem ID */ + 11, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x103c1791), + AZALIA_PIN_CFG(0, 0x12, 0x403c0000), + AZALIA_PIN_CFG(0, 0x14, 0x01014020), + AZALIA_PIN_CFG(0, 0x17, 0x90170110), + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + AZALIA_PIN_CFG(0, 0x19, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1a, 0x02a11030), + AZALIA_PIN_CFG(0, 0x1b, 0x0181303f), + AZALIA_PIN_CFG(0, 0x1d, 0x40400001), + AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), + AZALIA_PIN_CFG(0, 0x21, 0x0221102f), + + 0x80862806, /* Codec Vendor / Device ID: Intel */ + 0x103c1791, /* Subsystem ID */ + 4, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(3, 0x103c1791), + AZALIA_PIN_CFG(3, 0x05, 0x58560010), + AZALIA_PIN_CFG(3, 0x06, 0x18560020), + AZALIA_PIN_CFG(3, 0x07, 0x58560030), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/hp/snb_ivb_desktops/mainboard.c b/src/mainboard/hp/snb_ivb_desktops/mainboard.c new file mode 100644 index 0000000000..75dc3302a5 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/mainboard.c @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#if CONFIG(GENERATE_SMBIOS_TABLES) +static int mainboard_smbios_data(struct device *dev, int *handle, + unsigned long *current) +{ + int len = 0; + + // add IPMI Device Information + len += smbios_write_type38( + current, handle, + SMBIOS_BMC_INTERFACE_KCS, + 0x20, // IPMI Version + 0x20, // I2C address + 0xff, // no NV storage + 0, // IO port interface address + 0, + 0); // no IRQ + + return len; +} +#endif + +static void mainboard_enable(struct device *dev) +{ + install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, + GMA_INT15_PANEL_FIT_DEFAULT, + GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); +#if CONFIG(GENERATE_SMBIOS_TABLES) + dev->ops->get_smbios_data = mainboard_smbios_data; +#endif +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/gpio.c b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/gpio.c new file mode 100644 index 0000000000..fb80217291 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/gpio.c @@ -0,0 +1,177 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_NATIVE, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_NATIVE, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio15 = GPIO_LEVEL_LOW, + .gpio17 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio1 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio55 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio61 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio71 = GPIO_LEVEL_LOW, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + }, +}; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb new file mode 100644 index 0000000000..55bdaac23a --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb @@ -0,0 +1,18 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0 on + subsystemid 0x103c 0x1791 inherit + device pci 06.0 on end # Extra x4 port on north bridge + chip southbridge/intel/bd82x6x + register "sata_port_map" = "0x3f" + + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 on end # PCIe Port #3 + device pci 1c.3 on end # PCIe Port #4 + device pci 1c.5 on end # PCIe Port #6 + device pci 1c.6 on end # PCIe Port #7 + device pci 1c.7 on end # PCIe Port #8 + end + end +end diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/gpio.c b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/gpio.c new file mode 100644 index 0000000000..401681f659 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/gpio.c @@ -0,0 +1,191 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_NATIVE, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio15 = GPIO_LEVEL_LOW, + .gpio17 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio1 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio7 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_GPIO, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_INPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_INPUT, + .gpio46 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio55 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio61 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio71 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb new file mode 100644 index 0000000000..c31bf336d1 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb @@ -0,0 +1,12 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0 on + subsystemid 0x103c 0x1791 inherit + + chip southbridge/intel/bd82x6x + register "sata_port_map" = "0xf" + device pci 1c.4 on end # dummy setting + end + end +end diff --git a/src/mainboard/hp/z220_series/Kconfig b/src/mainboard/hp/z220_series/Kconfig deleted file mode 100644 index 2db3f5a19f..0000000000 --- a/src/mainboard/hp/z220_series/Kconfig +++ /dev/null @@ -1,64 +0,0 @@ -config BOARD_HP_Z220_SERIES_COMMON - def_bool n - select BOARD_ROMSIZE_KB_16384 - select GFX_GMA_ANALOG_I2C_HDMI_B - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select HAVE_CMOS_DEFAULT - select HAVE_OPTION_TABLE - select INTEL_GMA_HAVE_VBT - select INTEL_INT15 - select MAINBOARD_HAS_LIBGFXINIT - select MAINBOARD_HAS_TPM1 - select MAINBOARD_USES_IFD_GBE_REGION - select MEMORY_MAPPED_TPM - select NORTHBRIDGE_INTEL_SANDYBRIDGE - select SERIRQ_CONTINUOUS_MODE - select SOUTHBRIDGE_INTEL_BD82X6X - select SUPERIO_NUVOTON_NPCD378 - select USE_NATIVE_RAMINIT - -config BOARD_HP_Z220_CMT_WORKSTATION - select BOARD_HP_Z220_SERIES_COMMON - -config BOARD_HP_Z220_SFF_WORKSTATION - select BOARD_HP_Z220_SERIES_COMMON - -if BOARD_HP_Z220_SERIES_COMMON - -config VBOOT - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC - select GBB_FLAG_DISABLE_FWMP - select GBB_FLAG_DISABLE_LID_SHUTDOWN - select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC - select VBOOT_NO_BOARD_SUPPORT - select VBOOT_VBNV_FLASH - -config CBFS_SIZE - default 0x570000 - -config MAINBOARD_DIR - default "hp/z220_series" - -config VARIANT_DIR - default "z220_cmt_workstation" if BOARD_HP_Z220_CMT_WORKSTATION - default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION - -config MAINBOARD_PART_NUMBER - default "HP Z220 CMT Workstation" if BOARD_HP_Z220_CMT_WORKSTATION - default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION - -config OVERRIDE_DEVICETREE - default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" - -config INTEL_GMA_VBT_FILE - default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" - -config DRAM_RESET_GATE_GPIO - int - default 60 - -config USBDEBUG_HCD_INDEX - int - default 2 -endif diff --git a/src/mainboard/hp/z220_series/Kconfig.name b/src/mainboard/hp/z220_series/Kconfig.name deleted file mode 100644 index d39eb498e2..0000000000 --- a/src/mainboard/hp/z220_series/Kconfig.name +++ /dev/null @@ -1,5 +0,0 @@ -config BOARD_HP_Z220_CMT_WORKSTATION - bool "Z220 CMT Workstation" - -config BOARD_HP_Z220_SFF_WORKSTATION - bool "Z220 SFF Workstation" diff --git a/src/mainboard/hp/z220_series/Makefile.inc b/src/mainboard/hp/z220_series/Makefile.inc deleted file mode 100644 index 69ef08873b..0000000000 --- a/src/mainboard/hp/z220_series/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += variants/$(VARIANT_DIR)/gpio.c -romstage-y += variants/$(VARIANT_DIR)/gpio.c -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -bootblock-y += early_init.c -romstage-y += early_init.c diff --git a/src/mainboard/hp/z220_series/acpi/ec.asl b/src/mainboard/hp/z220_series/acpi/ec.asl deleted file mode 100644 index 16990d45f4..0000000000 --- a/src/mainboard/hp/z220_series/acpi/ec.asl +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: CC-PDDC */ - -/* Please update the license if adding licensable material. */ diff --git a/src/mainboard/hp/z220_series/acpi/pci.asl b/src/mainboard/hp/z220_series/acpi/pci.asl deleted file mode 100644 index ff3866a258..0000000000 --- a/src/mainboard/hp/z220_series/acpi/pci.asl +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -// Intel PCI to PCI bridge 0:1e.0 - -Device (PCIB) -{ - Name (_ADR, 0x001e0000) - Name (_PRW, Package() { 13, 4 }) // Power Resources for Wake - - Method (_PRT) // _PRT: PCI Interrupt Routing Table - { - If (PICM) { - Return (Package() { - Package() { 0x0000ffff, 0, 0, 0x14 }, - Package() { 0x0000ffff, 1, 0, 0x15 }, - Package() { 0x0000ffff, 2, 0, 0x16 }, - Package() { 0x0000ffff, 3, 0, 0x17 }, - Package() { 0x0001ffff, 0, 0, 0x15 }, - Package() { 0x0001ffff, 1, 0, 0x16 }, - Package() { 0x0001ffff, 2, 0, 0x17 }, - Package() { 0x0001ffff, 3, 0, 0x14 }, - }) - } - Return (Package() { - Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, - Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, - Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKF, 0 }, - Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKE, 0 }, - }) - } -} diff --git a/src/mainboard/hp/z220_series/acpi/platform.asl b/src/mainboard/hp/z220_series/acpi/platform.asl deleted file mode 100644 index 861d3cdf71..0000000000 --- a/src/mainboard/hp/z220_series/acpi/platform.asl +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Method(_WAK, 1, NotSerialized) -{ - // Generated by SSDT - \_SB.PCI0.LPCB.SIO0.SIOW (Arg0) - - Return(Package(){0,0}) -} - -Method(_PTS, 1, NotSerialized) -{ - // Generated by SSDT - \_SB.PCI0.LPCB.SIO0.SIOS (Arg0) -} diff --git a/src/mainboard/hp/z220_series/acpi/superio.asl b/src/mainboard/hp/z220_series/acpi/superio.asl deleted file mode 100644 index 506c6d4c2d..0000000000 --- a/src/mainboard/hp/z220_series/acpi/superio.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -Scope (\_GPE) -{ - Method (_L0D, 0, NotSerialized) - { - Notify (\_SB.PCI0.EHC1, 0x02) - Notify (\_SB.PCI0.EHC2, 0x02) - //FIXME: Add GBE device - //Notify (\_SB.PCI0.GBE, 0x02) - } - - Method (_L09, 0, NotSerialized) - { - Notify (\_SB.PCI0.RP01, 0x02) - Notify (\_SB.PCI0.RP02, 0x02) - Notify (\_SB.PCI0.RP03, 0x02) - Notify (\_SB.PCI0.RP04, 0x02) - Notify (\_SB.PCI0.RP05, 0x02) - Notify (\_SB.PCI0.RP06, 0x02) - Notify (\_SB.PCI0.RP07, 0x02) - Notify (\_SB.PCI0.RP08, 0x02) - Notify (\_SB.PCI0.PEGP, 0x02) - } -} diff --git a/src/mainboard/hp/z220_series/board_info.txt b/src/mainboard/hp/z220_series/board_info.txt deleted file mode 100644 index 4d6f6f98b7..0000000000 --- a/src/mainboard/hp/z220_series/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: https://support.hp.com/de-de/product/HP-Compaq-8200-Elite-Small-Form-Factor-PC/5037931 -ROM IC: MX25L6405 -ROM package: SOIC-8 -ROM socketed: no -Flashrom support: yes -Release year: 2013 diff --git a/src/mainboard/hp/z220_series/cmos.default b/src/mainboard/hp/z220_series/cmos.default deleted file mode 100644 index 6d27a79c66..0000000000 --- a/src/mainboard/hp/z220_series/cmos.default +++ /dev/null @@ -1,7 +0,0 @@ -boot_option=Fallback -debug_level=Debug -power_on_after_fail=Enable -nmi=Enable -sata_mode=AHCI -gfx_uma_size=32M -psu_fan_lvl=3 diff --git a/src/mainboard/hp/z220_series/cmos.layout b/src/mainboard/hp/z220_series/cmos.layout deleted file mode 100644 index 1fc83b1a55..0000000000 --- a/src/mainboard/hp/z220_series/cmos.layout +++ /dev/null @@ -1,74 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -# ----------------------------------------------------------------- -entries - -# ----------------------------------------------------------------- -0 120 r 0 reserved_memory - -# ----------------------------------------------------------------- -# RTC_BOOT_BYTE (coreboot hardcoded) -384 1 e 4 boot_option -388 4 h 0 reboot_counter - -# ----------------------------------------------------------------- -# coreboot config options: console -395 4 e 6 debug_level -400 3 h 0 psu_fan_lvl - -# coreboot config options: southbridge -408 1 e 1 nmi -409 2 e 7 power_on_after_fail - -421 1 e 9 sata_mode - -# coreboot config options: northbridge -432 3 e 11 gfx_uma_size - -448 128 r 0 vbnv - -# SandyBridge MRC Scrambler Seed values -896 32 r 0 mrc_scrambler_seed -928 32 r 0 mrc_scrambler_seed_s3 -960 16 r 0 mrc_scrambler_seed_chk - -# coreboot config options: check sums -984 16 h 0 check_sum - -# ----------------------------------------------------------------- - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -6 0 Emergency -6 1 Alert -6 2 Critical -6 3 Error -6 4 Warning -6 5 Notice -6 6 Info -6 7 Debug -6 8 Spew -7 0 Disable -7 1 Enable -7 2 Keep -9 0 AHCI -9 1 IDE -11 0 32M -11 1 64M -11 2 96M -11 3 128M -11 4 160M -11 5 192M -11 6 224M - -# ----------------------------------------------------------------- -checksums - -checksum 392 415 984 diff --git a/src/mainboard/hp/z220_series/data.vbt b/src/mainboard/hp/z220_series/data.vbt deleted file mode 100644 index c1fd6d1e13..0000000000 Binary files a/src/mainboard/hp/z220_series/data.vbt and /dev/null differ diff --git a/src/mainboard/hp/z220_series/devicetree.cb b/src/mainboard/hp/z220_series/devicetree.cb deleted file mode 100644 index f02ff76123..0000000000 --- a/src/mainboard/hp/z220_series/devicetree.cb +++ /dev/null @@ -1,161 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -chip northbridge/intel/sandybridge - register "gfx.use_spread_spectrum_clock" = "0" - register "gpu_dp_b_hotplug" = "0" - register "gpu_dp_c_hotplug" = "0" - register "gpu_dp_d_hotplug" = "0" - # BTX mainboard: Reversed mapping - register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}" - - device domain 0 on - subsystemid 0x103c 0x1791 inherit - - device ref host_bridge on end # Host bridge Host bridge - device ref peg10 on end # PCIe Bridge for discrete graphics - device ref igd on end # Internal graphics VGA controller - device ref peg60 off end # Extra x4 port on north bridge - - chip southbridge/intel/bd82x6x # Intel Series 7 PCH - register "docking_supported" = "0" - register "gen1_dec" = "0x00fc0601" - register "gen2_dec" = "0x00fc0801" - register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - register "pcie_port_coalesce" = "true" - register "sata_interface_speed_support" = "0x3" - register "spi_lvscc" = "0x2005" - register "spi_uvscc" = "0x2005" - register "superspeed_capable_ports" = "0x0000000f" - register "xhci_switchable_ports" = "0x0000000f" - register "xhci_overcurrent_mapping" = "0x0000000f" - - device ref xhci on end # xHCI - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt on end # Management Engine KT - device ref gbe on end # Intel Gigabit Ethernet - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio controller - device ref pcie_rp1 on end # PCIe Port #1 - device ref pcie_rp2 off end # PCIe Port #2 - device ref pcie_rp3 off end # PCIe Port #3 - device ref pcie_rp4 off end # PCIe Port #4 - device ref pcie_rp5 on end # PCIe Port #5 - device ref pcie_rp6 off end # PCIe Port #6 - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref pci_bridge on end # PCI bridge - device ref lpc on # LPC bridge PCI-LPC bridge - chip superio/common - device pnp 2e.ff on # passes SIO base addr to SSDT gen - chip superio/nuvoton/npcd378 - device pnp 2e.0 off end # Floppy - device pnp 2e.1 on # Parallel port - # global - - # serialice: Vendor writes: - irq 0x14 = 0x9c - irq 0x1c = 0xa8 - irq 0x1d = 0x08 - irq 0x22 = 0x3f - irq 0x1a = 0xb0 - # dumped from superiotool: - irq 0x1b = 0x1e - irq 0x27 = 0x08 - irq 0x2a = 0x20 - irq 0x2d = 0x01 - # parallel port - io 0x60 = 0x378 - irq 0x70 = 0x07 - drq 0x74 = 0x01 - end - device pnp 2e.2 off # COM1 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.3 on # COM2, IR - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.4 on # LED control - io 0x60 = 0x600 - # IOBASE[0h] = bit0 LED red / green - # IOBASE[0h] = bit1-4 LED PWM duty cycle - # IOBASE[1h] = bit6 SWCC - - io 0x62 = 0x610 - # IOBASE [0h] = GPES - # IOBASE [1h] = GPEE - # IOBASE [4h:7h] = 32bit upcounter at 1Mhz - # IOBASE [8h:bh] = GPS - # IOBASE [ch:fh] = GPE - end - device pnp 2e.5 on # Mouse - irq 0x70 = 0xc - end - device pnp 2e.6 on # Keyboard - io 0x60 = 0x0060 - io 0x62 = 0x0064 - irq 0x70 = 0x01 - # serialice: Vendor writes: - drq 0xf0 = 0x40 - end - device pnp 2e.7 on # WDT ? - io 0x60 = 0x620 - end - device pnp 2e.8 on # HWM - io 0x60 = 0x800 - # IOBASE[0h:feh] HWM page - # IOBASE[ffh] bit0-bit3 page selector - - drq 0xf0 = 0x20 - drq 0xf1 = 0x01 - drq 0xf2 = 0x40 - drq 0xf3 = 0x01 - - drq 0xf4 = 0x66 - drq 0xf5 = 0x67 - drq 0xf6 = 0x66 - drq 0xf7 = 0x01 - end - device pnp 2e.f on # GPIO OD ? - drq 0xf1 = 0x97 - drq 0xf2 = 0x01 - drq 0xf5 = 0x08 - drq 0xfe = 0x80 - end - device pnp 2e.15 on # BUS ? - io 0x60 = 0x0680 - io 0x62 = 0x0690 - end - device pnp 2e.1c on # Suspend Control ? - io 0x60 = 0x640 - # writing to IOBASE[5h] - # 0x0: Power off - # 0x9: Power off and bricked until CMOS battery removed - end - device pnp 2e.1e on # GPIO ? - io 0x60 = 0x660 - drq 0xf4 = 0x01 - # skip the following, as it - # looks like remapped registers - #drq 0xf5 = 0x06 - #drq 0xf6 = 0x60 - #drq 0xfe = 0x03 - end - end - end - end - chip drivers/pc80/tpm - device pnp 4e.0 on end # TPM module - end - end - device ref sata1 on end # SATA Controller 1 - device ref smbus on end # SMBus - device ref sata2 off end # SATA Controller 2 - device ref thermal off end # Thermal - end - end -end diff --git a/src/mainboard/hp/z220_series/dsdt.asl b/src/mainboard/hp/z220_series/dsdt.asl deleted file mode 100644 index 57149b75b1..0000000000 --- a/src/mainboard/hp/z220_series/dsdt.asl +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -DefinitionBlock( - "dsdt.aml", - "DSDT", - ACPI_DSDT_REV_2, - OEM_ID, - ACPI_TABLE_CREATOR, - 0x20141018 // OEM revision -) -{ - #include - #include "acpi/platform.asl" - #include - #include - /* global NVS and variables. */ - #include - #include - - Scope (\_SB) { - Device (PCI0) - { - #include - #include - #include "acpi/pci.asl" - } - } -} diff --git a/src/mainboard/hp/z220_series/early_init.c b/src/mainboard/hp/z220_series/early_init.c deleted file mode 100644 index 74a646238c..0000000000 --- a/src/mainboard/hp/z220_series/early_init.c +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 1, 5 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 7 }, - { 1, 0, 7 }, -}; - -void bootblock_mainboard_early_init(void) -{ - if (CONFIG(CONSOLE_SERIAL)) - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} diff --git a/src/mainboard/hp/z220_series/gma-mainboard.ads b/src/mainboard/hp/z220_series/gma-mainboard.ads deleted file mode 100644 index 686f7d44db..0000000000 --- a/src/mainboard/hp/z220_series/gma-mainboard.ads +++ /dev/null @@ -1,17 +0,0 @@ --- SPDX-License-Identifier: GPL-2.0-or-later - -with HW.GFX.GMA; -with HW.GFX.GMA.Display_Probing; - -use HW.GFX.GMA; -use HW.GFX.GMA.Display_Probing; - -private package GMA.Mainboard is - - ports : constant Port_List := - (DP2, - HDMI2, - Analog, - others => Disabled); - -end GMA.Mainboard; diff --git a/src/mainboard/hp/z220_series/hda_verb.c b/src/mainboard/hp/z220_series/hda_verb.c deleted file mode 100644 index 27ab4b5275..0000000000 --- a/src/mainboard/hp/z220_series/hda_verb.c +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -const u32 cim_verb_data[] = { - 0x10ec0221, /* Codec Vendor / Device ID: Realtek */ - 0x103c1791, /* Subsystem ID */ - 11, /* Number of 4 dword sets */ - AZALIA_SUBVENDOR(0, 0x103c1791), - AZALIA_PIN_CFG(0, 0x12, 0x403c0000), - AZALIA_PIN_CFG(0, 0x14, 0x01014020), - AZALIA_PIN_CFG(0, 0x17, 0x90170110), - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - AZALIA_PIN_CFG(0, 0x19, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1a, 0x02a11030), - AZALIA_PIN_CFG(0, 0x1b, 0x0181303f), - AZALIA_PIN_CFG(0, 0x1d, 0x40400001), - AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), - AZALIA_PIN_CFG(0, 0x21, 0x0221102f), - - 0x80862806, /* Codec Vendor / Device ID: Intel */ - 0x103c1791, /* Subsystem ID */ - 4, /* Number of 4 dword sets */ - AZALIA_SUBVENDOR(3, 0x103c1791), - AZALIA_PIN_CFG(3, 0x05, 0x58560010), - AZALIA_PIN_CFG(3, 0x06, 0x18560020), - AZALIA_PIN_CFG(3, 0x07, 0x58560030), -}; - -const u32 pc_beep_verbs[0] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/hp/z220_series/mainboard.c b/src/mainboard/hp/z220_series/mainboard.c deleted file mode 100644 index 75dc3302a5..0000000000 --- a/src/mainboard/hp/z220_series/mainboard.c +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include - -#if CONFIG(GENERATE_SMBIOS_TABLES) -static int mainboard_smbios_data(struct device *dev, int *handle, - unsigned long *current) -{ - int len = 0; - - // add IPMI Device Information - len += smbios_write_type38( - current, handle, - SMBIOS_BMC_INTERFACE_KCS, - 0x20, // IPMI Version - 0x20, // I2C address - 0xff, // no NV storage - 0, // IO port interface address - 0, - 0); // no IRQ - - return len; -} -#endif - -static void mainboard_enable(struct device *dev) -{ - install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, - GMA_INT15_PANEL_FIT_DEFAULT, - GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); -#if CONFIG(GENERATE_SMBIOS_TABLES) - dev->ops->get_smbios_data = mainboard_smbios_data; -#endif -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c b/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c deleted file mode 100644 index fb80217291..0000000000 --- a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c +++ /dev/null @@ -1,177 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio0 = GPIO_MODE_GPIO, - .gpio1 = GPIO_MODE_GPIO, - .gpio2 = GPIO_MODE_NATIVE, - .gpio3 = GPIO_MODE_NATIVE, - .gpio4 = GPIO_MODE_NATIVE, - .gpio5 = GPIO_MODE_NATIVE, - .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_NATIVE, - .gpio8 = GPIO_MODE_GPIO, - .gpio9 = GPIO_MODE_NATIVE, - .gpio10 = GPIO_MODE_NATIVE, - .gpio11 = GPIO_MODE_NATIVE, - .gpio12 = GPIO_MODE_NATIVE, - .gpio13 = GPIO_MODE_GPIO, - .gpio14 = GPIO_MODE_NATIVE, - .gpio15 = GPIO_MODE_GPIO, - .gpio16 = GPIO_MODE_GPIO, - .gpio17 = GPIO_MODE_GPIO, - .gpio18 = GPIO_MODE_NATIVE, - .gpio19 = GPIO_MODE_NATIVE, - .gpio20 = GPIO_MODE_NATIVE, - .gpio21 = GPIO_MODE_GPIO, - .gpio22 = GPIO_MODE_GPIO, - .gpio23 = GPIO_MODE_NATIVE, - .gpio24 = GPIO_MODE_GPIO, - .gpio25 = GPIO_MODE_NATIVE, - .gpio26 = GPIO_MODE_NATIVE, - .gpio27 = GPIO_MODE_GPIO, - .gpio28 = GPIO_MODE_GPIO, - .gpio29 = GPIO_MODE_GPIO, - .gpio30 = GPIO_MODE_NATIVE, - .gpio31 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio0 = GPIO_DIR_INPUT, - .gpio1 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio8 = GPIO_DIR_INPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio15 = GPIO_DIR_OUTPUT, - .gpio16 = GPIO_DIR_INPUT, - .gpio17 = GPIO_DIR_OUTPUT, - .gpio21 = GPIO_DIR_INPUT, - .gpio22 = GPIO_DIR_INPUT, - .gpio24 = GPIO_DIR_INPUT, - .gpio27 = GPIO_DIR_INPUT, - .gpio28 = GPIO_DIR_OUTPUT, - .gpio29 = GPIO_DIR_OUTPUT, - .gpio31 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio15 = GPIO_LEVEL_LOW, - .gpio17 = GPIO_LEVEL_LOW, - .gpio28 = GPIO_LEVEL_LOW, - .gpio29 = GPIO_LEVEL_HIGH, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_blink = { -}; - -static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio0 = GPIO_INVERT, - .gpio1 = GPIO_INVERT, - .gpio6 = GPIO_INVERT, - .gpio13 = GPIO_INVERT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_mode = { - .gpio32 = GPIO_MODE_GPIO, - .gpio33 = GPIO_MODE_GPIO, - .gpio34 = GPIO_MODE_GPIO, - .gpio35 = GPIO_MODE_GPIO, - .gpio36 = GPIO_MODE_GPIO, - .gpio37 = GPIO_MODE_GPIO, - .gpio38 = GPIO_MODE_GPIO, - .gpio39 = GPIO_MODE_GPIO, - .gpio40 = GPIO_MODE_NATIVE, - .gpio41 = GPIO_MODE_NATIVE, - .gpio42 = GPIO_MODE_NATIVE, - .gpio43 = GPIO_MODE_GPIO, - .gpio44 = GPIO_MODE_NATIVE, - .gpio45 = GPIO_MODE_NATIVE, - .gpio46 = GPIO_MODE_NATIVE, - .gpio47 = GPIO_MODE_NATIVE, - .gpio48 = GPIO_MODE_GPIO, - .gpio49 = GPIO_MODE_GPIO, - .gpio50 = GPIO_MODE_NATIVE, - .gpio51 = GPIO_MODE_NATIVE, - .gpio52 = GPIO_MODE_NATIVE, - .gpio53 = GPIO_MODE_NATIVE, - .gpio54 = GPIO_MODE_GPIO, - .gpio55 = GPIO_MODE_GPIO, - .gpio56 = GPIO_MODE_NATIVE, - .gpio57 = GPIO_MODE_GPIO, - .gpio58 = GPIO_MODE_NATIVE, - .gpio59 = GPIO_MODE_NATIVE, - .gpio60 = GPIO_MODE_NATIVE, - .gpio61 = GPIO_MODE_GPIO, - .gpio62 = GPIO_MODE_NATIVE, - .gpio63 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio32 = GPIO_DIR_OUTPUT, - .gpio33 = GPIO_DIR_INPUT, - .gpio34 = GPIO_DIR_INPUT, - .gpio35 = GPIO_DIR_INPUT, - .gpio36 = GPIO_DIR_INPUT, - .gpio37 = GPIO_DIR_INPUT, - .gpio38 = GPIO_DIR_INPUT, - .gpio39 = GPIO_DIR_INPUT, - .gpio43 = GPIO_DIR_INPUT, - .gpio48 = GPIO_DIR_INPUT, - .gpio49 = GPIO_DIR_INPUT, - .gpio54 = GPIO_DIR_INPUT, - .gpio55 = GPIO_DIR_INPUT, - .gpio57 = GPIO_DIR_INPUT, - .gpio61 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_level = { - .gpio32 = GPIO_LEVEL_LOW, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_mode = { - .gpio64 = GPIO_MODE_NATIVE, - .gpio65 = GPIO_MODE_NATIVE, - .gpio66 = GPIO_MODE_NATIVE, - .gpio67 = GPIO_MODE_NATIVE, - .gpio68 = GPIO_MODE_GPIO, - .gpio69 = GPIO_MODE_GPIO, - .gpio70 = GPIO_MODE_GPIO, - .gpio71 = GPIO_MODE_GPIO, - .gpio72 = GPIO_MODE_GPIO, - .gpio73 = GPIO_MODE_NATIVE, - .gpio74 = GPIO_MODE_NATIVE, - .gpio75 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_direction = { - .gpio68 = GPIO_DIR_INPUT, - .gpio69 = GPIO_DIR_INPUT, - .gpio70 = GPIO_DIR_INPUT, - .gpio71 = GPIO_DIR_OUTPUT, - .gpio72 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_level = { - .gpio71 = GPIO_LEVEL_LOW, -}; - -const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, - .invert = &pch_gpio_set1_invert, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - }, - .set3 = { - .mode = &pch_gpio_set3_mode, - .direction = &pch_gpio_set3_direction, - .level = &pch_gpio_set3_level, - }, -}; diff --git a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb deleted file mode 100644 index 55bdaac23a..0000000000 --- a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb +++ /dev/null @@ -1,18 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -chip northbridge/intel/sandybridge - device domain 0 on - subsystemid 0x103c 0x1791 inherit - device pci 06.0 on end # Extra x4 port on north bridge - chip southbridge/intel/bd82x6x - register "sata_port_map" = "0x3f" - - device pci 1c.1 on end # PCIe Port #2 - device pci 1c.2 on end # PCIe Port #3 - device pci 1c.3 on end # PCIe Port #4 - device pci 1c.5 on end # PCIe Port #6 - device pci 1c.6 on end # PCIe Port #7 - device pci 1c.7 on end # PCIe Port #8 - end - end -end diff --git a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c deleted file mode 100644 index 401681f659..0000000000 --- a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c +++ /dev/null @@ -1,191 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio0 = GPIO_MODE_GPIO, - .gpio1 = GPIO_MODE_GPIO, - .gpio2 = GPIO_MODE_NATIVE, - .gpio3 = GPIO_MODE_NATIVE, - .gpio4 = GPIO_MODE_NATIVE, - .gpio5 = GPIO_MODE_NATIVE, - .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_GPIO, - .gpio8 = GPIO_MODE_GPIO, - .gpio9 = GPIO_MODE_NATIVE, - .gpio10 = GPIO_MODE_NATIVE, - .gpio11 = GPIO_MODE_NATIVE, - .gpio12 = GPIO_MODE_NATIVE, - .gpio13 = GPIO_MODE_GPIO, - .gpio14 = GPIO_MODE_NATIVE, - .gpio15 = GPIO_MODE_GPIO, - .gpio16 = GPIO_MODE_GPIO, - .gpio17 = GPIO_MODE_GPIO, - .gpio18 = GPIO_MODE_NATIVE, - .gpio19 = GPIO_MODE_NATIVE, - .gpio20 = GPIO_MODE_NATIVE, - .gpio21 = GPIO_MODE_GPIO, - .gpio22 = GPIO_MODE_GPIO, - .gpio23 = GPIO_MODE_NATIVE, - .gpio24 = GPIO_MODE_GPIO, - .gpio25 = GPIO_MODE_NATIVE, - .gpio26 = GPIO_MODE_NATIVE, - .gpio27 = GPIO_MODE_GPIO, - .gpio28 = GPIO_MODE_GPIO, - .gpio29 = GPIO_MODE_GPIO, - .gpio30 = GPIO_MODE_NATIVE, - .gpio31 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio0 = GPIO_DIR_INPUT, - .gpio1 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_INPUT, - .gpio8 = GPIO_DIR_INPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio15 = GPIO_DIR_OUTPUT, - .gpio16 = GPIO_DIR_INPUT, - .gpio17 = GPIO_DIR_OUTPUT, - .gpio21 = GPIO_DIR_INPUT, - .gpio22 = GPIO_DIR_INPUT, - .gpio24 = GPIO_DIR_INPUT, - .gpio27 = GPIO_DIR_INPUT, - .gpio28 = GPIO_DIR_OUTPUT, - .gpio29 = GPIO_DIR_OUTPUT, - .gpio31 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio15 = GPIO_LEVEL_LOW, - .gpio17 = GPIO_LEVEL_LOW, - .gpio28 = GPIO_LEVEL_LOW, - .gpio29 = GPIO_LEVEL_HIGH, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_reset = { -}; - -static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio0 = GPIO_INVERT, - .gpio1 = GPIO_INVERT, - .gpio6 = GPIO_INVERT, - .gpio7 = GPIO_INVERT, - .gpio13 = GPIO_INVERT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_blink = { -}; - -static const struct pch_gpio_set2 pch_gpio_set2_mode = { - .gpio32 = GPIO_MODE_GPIO, - .gpio33 = GPIO_MODE_GPIO, - .gpio34 = GPIO_MODE_GPIO, - .gpio35 = GPIO_MODE_GPIO, - .gpio36 = GPIO_MODE_GPIO, - .gpio37 = GPIO_MODE_GPIO, - .gpio38 = GPIO_MODE_GPIO, - .gpio39 = GPIO_MODE_GPIO, - .gpio40 = GPIO_MODE_NATIVE, - .gpio41 = GPIO_MODE_NATIVE, - .gpio42 = GPIO_MODE_NATIVE, - .gpio43 = GPIO_MODE_GPIO, - .gpio44 = GPIO_MODE_NATIVE, - .gpio45 = GPIO_MODE_NATIVE, - .gpio46 = GPIO_MODE_GPIO, - .gpio47 = GPIO_MODE_NATIVE, - .gpio48 = GPIO_MODE_GPIO, - .gpio49 = GPIO_MODE_GPIO, - .gpio50 = GPIO_MODE_NATIVE, - .gpio51 = GPIO_MODE_NATIVE, - .gpio52 = GPIO_MODE_NATIVE, - .gpio53 = GPIO_MODE_NATIVE, - .gpio54 = GPIO_MODE_GPIO, - .gpio55 = GPIO_MODE_GPIO, - .gpio56 = GPIO_MODE_NATIVE, - .gpio57 = GPIO_MODE_GPIO, - .gpio58 = GPIO_MODE_NATIVE, - .gpio59 = GPIO_MODE_NATIVE, - .gpio60 = GPIO_MODE_NATIVE, - .gpio61 = GPIO_MODE_GPIO, - .gpio62 = GPIO_MODE_NATIVE, - .gpio63 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio32 = GPIO_DIR_INPUT, - .gpio33 = GPIO_DIR_INPUT, - .gpio34 = GPIO_DIR_INPUT, - .gpio35 = GPIO_DIR_INPUT, - .gpio36 = GPIO_DIR_INPUT, - .gpio37 = GPIO_DIR_INPUT, - .gpio38 = GPIO_DIR_INPUT, - .gpio39 = GPIO_DIR_INPUT, - .gpio43 = GPIO_DIR_INPUT, - .gpio46 = GPIO_DIR_INPUT, - .gpio48 = GPIO_DIR_INPUT, - .gpio49 = GPIO_DIR_INPUT, - .gpio54 = GPIO_DIR_INPUT, - .gpio55 = GPIO_DIR_INPUT, - .gpio57 = GPIO_DIR_INPUT, - .gpio61 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_level = { -}; - -static const struct pch_gpio_set2 pch_gpio_set2_reset = { -}; - -static const struct pch_gpio_set3 pch_gpio_set3_mode = { - .gpio64 = GPIO_MODE_NATIVE, - .gpio65 = GPIO_MODE_NATIVE, - .gpio66 = GPIO_MODE_NATIVE, - .gpio67 = GPIO_MODE_NATIVE, - .gpio68 = GPIO_MODE_GPIO, - .gpio69 = GPIO_MODE_GPIO, - .gpio70 = GPIO_MODE_GPIO, - .gpio71 = GPIO_MODE_GPIO, - .gpio72 = GPIO_MODE_GPIO, - .gpio73 = GPIO_MODE_NATIVE, - .gpio74 = GPIO_MODE_NATIVE, - .gpio75 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_direction = { - .gpio68 = GPIO_DIR_INPUT, - .gpio69 = GPIO_DIR_INPUT, - .gpio70 = GPIO_DIR_INPUT, - .gpio71 = GPIO_DIR_OUTPUT, - .gpio72 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_level = { - .gpio71 = GPIO_LEVEL_LOW, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_reset = { -}; - -const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, - .invert = &pch_gpio_set1_invert, - .reset = &pch_gpio_set1_reset, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - .reset = &pch_gpio_set2_reset, - }, - .set3 = { - .mode = &pch_gpio_set3_mode, - .direction = &pch_gpio_set3_direction, - .level = &pch_gpio_set3_level, - .reset = &pch_gpio_set3_reset, - }, -}; diff --git a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb deleted file mode 100644 index c31bf336d1..0000000000 --- a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb +++ /dev/null @@ -1,12 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -chip northbridge/intel/sandybridge - device domain 0 on - subsystemid 0x103c 0x1791 inherit - - chip southbridge/intel/bd82x6x - register "sata_port_map" = "0xf" - device pci 1c.4 on end # dummy setting - end - end -end -- cgit v1.2.3