From b9c224e9c53c8e0df9835c0cfe5d28f98678c375 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Thu, 16 Dec 2010 19:57:54 +0000 Subject: Add TINY_BOOTBLOCK support for the SiS966 southbridge. Signed-off-by: Uwe Hermann Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 2 -- src/southbridge/sis/sis966/Kconfig | 5 +++ src/southbridge/sis/sis966/bootblock.c | 47 +++++++++++++++++++++++++++ src/southbridge/sis/sis966/enable_rom.c | 41 ----------------------- src/southbridge/sis/sis966/enable_usbdebug.c | 6 ---- src/southbridge/sis/sis966/ide.c | 1 + src/southbridge/sis/sis966/sis966.h | 13 ++++++-- 7 files changed, 64 insertions(+), 51 deletions(-) create mode 100644 src/southbridge/sis/sis966/bootblock.c delete mode 100644 src/southbridge/sis/sis966/enable_rom.c diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 50c52b67c5..da6eb7701e 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -40,7 +40,6 @@ #include #include "southbridge/sis/sis966/sis966.h" #include "southbridge/sis/sis966/early_smbus.c" -#include "southbridge/sis/sis966/enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -131,7 +130,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Allow the HT devices to be found */ enumerate_ht_chain(); sio_setup(); - sis966_enable_rom(); } if (bist == 0) diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index bbb5ee971b..867d08c347 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -2,6 +2,11 @@ config SOUTHBRIDGE_SIS_SIS966 bool select IOAPIC select HAVE_USBDEBUG + select TINY_BOOTBLOCK + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966 config ID_SECTION_OFFSET hex diff --git a/src/southbridge/sis/sis966/bootblock.c b/src/southbridge/sis/sis966/bootblock.c new file mode 100644 index 0000000000..1ff3cda2b4 --- /dev/null +++ b/src/southbridge/sis/sis966/bootblock.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu for AMD. + * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) + * Written by Morgan Tsai for SiS. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include "sis966.h" + +static void sis966_enable_rom(void) +{ + device_t addr; + + /* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */ + addr = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, + PCI_DEVICE_ID_SIS_SIS966_LPC), 0); + + /* Set the 4MB enable bit(s). */ + pci_write_config8(addr, 0x40, pci_read_config8(addr, 0x40) | 0x11); +} + +static void bootblock_southbridge_init(void) +{ + sis966_enable_rom(); +} diff --git a/src/southbridge/sis/sis966/enable_rom.c b/src/southbridge/sis/sis966/enable_rom.c deleted file mode 100644 index 63ef616563..0000000000 --- a/src/southbridge/sis/sis966/enable_rom.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * Written by Yinghai Lu for Tyan Computer. - * Copyright (C) 2006,2007 AMD - * Written by Yinghai Lu for AMD. - * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) - * Written by Morgan Tsai for SiS. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE - #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE -#else - #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE -#endif - -static void sis966_enable_rom(void) -{ - device_t addr; - - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - addr = pci_locate_device(PCI_ID(0x1039, 0x0966), 0); - - /* Set the 4MB enable bit bit */ - pci_write_config8(addr, 0x40, pci_read_config8(addr, 0x40) | 0x11); -} diff --git a/src/southbridge/sis/sis966/enable_usbdebug.c b/src/southbridge/sis/sis966/enable_usbdebug.c index a82e941b3a..fb20c960f3 100644 --- a/src/southbridge/sis/sis966/enable_usbdebug.c +++ b/src/southbridge/sis/sis966/enable_usbdebug.c @@ -30,12 +30,6 @@ #include #include "sis966.h" -#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE -#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE -#else -#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE -#endif - void set_debug_port(unsigned int port) { u32 dword; diff --git a/src/southbridge/sis/sis966/ide.c b/src/southbridge/sis/sis966/ide.c index c57be5ade7..90ea002a5a 100644 --- a/src/southbridge/sis/sis966/ide.c +++ b/src/southbridge/sis/sis966/ide.c @@ -30,6 +30,7 @@ #include #include #include "sis966.h" +#include "chip.h" uint8_t SiS_SiS5513_init[49][3]={ {0x04, 0xFF, 0x05}, diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h index 324beef3c9..a451bf7e55 100644 --- a/src/southbridge/sis/sis966/sis966.h +++ b/src/southbridge/sis/sis966/sis966.h @@ -22,6 +22,12 @@ #ifndef SIS966_H #define SIS966_H +#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE +#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#else +#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#endif + #define DEBUG_AZA 0 #define DEBUG_NIC 0 #define DEBUG_IDE 0 @@ -29,9 +35,12 @@ #define DEBUG_USB 0 #define DEBUG_USB2 0 -#include "chip.h" - +#if !defined(__ROMCC__) void sis966_enable(device_t dev); +#endif + +#if defined(__PRE_RAM__) && !defined(__ROMCC__) void sis966_enable_usbdebug(unsigned int port); +#endif #endif /* SIS966_H */ -- cgit v1.2.3