From b79d058767f782718d757c41377132de573aac4c Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 17 Apr 2017 18:36:26 -0500 Subject: soc/broadwell: add ACPI method to generate USB port info Add ACPI method GPLD to generate port location data when passed visiblity info. Will be used by _PLD method in board-specific USB .asl files. Change-Id: Id6e6699fe3eaafbe6847479d45c70a1d57bd327a Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/19969 Tested-by: build bot (Jenkins) Reviewed-by: Sumeet R Pawnikar --- src/soc/intel/broadwell/acpi/xhci.asl | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/soc/intel/broadwell/acpi/xhci.asl b/src/soc/intel/broadwell/acpi/xhci.asl index 53b3956908..d638a27d30 100644 --- a/src/soc/intel/broadwell/acpi/xhci.asl +++ b/src/soc/intel/broadwell/acpi/xhci.asl @@ -355,6 +355,22 @@ Device (XHCI) { Name (_ADR, 0x00000000) + // GPLD: Generate Port Location Data (PLD) + Method (GPLD, 1, Serialized) { + Name (PCKG, Package (0x01) { + Buffer (0x10) {} + }) + + // REV: Revision 0x02 for ACPI 5.0 + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) + Store (0x02, REV) + + // VISI: Port visibility to user per port + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) + Store (Arg0, VISI) + Return (PCKG) + } + Device (PRT1) { Name (_ADR, 1) } // USB Port 0 Device (PRT2) { Name (_ADR, 2) } // USB Port 1 Device (PRT3) { Name (_ADR, 3) } // USB Port 2 -- cgit v1.2.3