From b262293607fa383bd90e68aa38d13e676ba4a014 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 28 May 2018 13:27:52 +0200 Subject: mb/getac: Get rid of whitespace before tab Change-Id: Ib7068f381971d1270b22cb03937f1e7fa30acb46 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/26619 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/getac/p470/acpi/ec.asl | 2 +- src/mainboard/getac/p470/devicetree.cb | 20 ++++++++++---------- src/mainboard/getac/p470/ec_oem.h | 4 ++-- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl index 3c6cecfbbb..6783289b94 100644 --- a/src/mainboard/getac/p470/acpi/ec.asl +++ b/src/mainboard/getac/p470/acpi/ec.asl @@ -26,7 +26,7 @@ Device(EC0) { MODE, 1, // Thermal Policy (Quiet/Perform) FAN, 1, // Fan Power (On/Off) - LIDS, 1, // LID Status (0=Open/1=Close) + LIDS, 1, // LID Status (0=Open/1=Close) LSW0, 1, // LCD Power Switch BTYP, 1, // Battery Type (0=LiIon/1=NiMh) diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 415d9a3945..ad3b625a76 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -63,19 +63,19 @@ chip northbridge/intel/i945 register "docking_supported" = "1" register "p_cnt_throttling_supported" = "1" - device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe port 1 - device pci 1c.1 on end # PCIe port 2 - device pci 1c.2 on end # PCIe port 3 + device pci 1b.0 on end # High Definition Audio + device pci 1c.0 on end # PCIe port 1 + device pci 1c.1 on end # PCIe port 2 + device pci 1c.2 on end # PCIe port 3 device pci 1c.3 on end # PCIe port 4 #device pci 1c.4 off end # PCIe port 5 #device pci 1c.5 off end # PCIe port 6 - device pci 1d.0 on end # USB UHCI - device pci 1d.1 on end # USB UHCI - device pci 1d.2 on end # USB UHCI - device pci 1d.3 on end # USB UHCI - device pci 1d.7 on end # USB2 EHCI - device pci 1e.0 on + device pci 1d.0 on end # USB UHCI + device pci 1d.1 on end # USB UHCI + device pci 1d.2 on end # USB UHCI + device pci 1d.3 on end # USB UHCI + device pci 1d.7 on end # USB2 EHCI + device pci 1e.0 on chip southbridge/ti/pcixx12 end diff --git a/src/mainboard/getac/p470/ec_oem.h b/src/mainboard/getac/p470/ec_oem.h index 38fb7bdf23..5d5610787d 100644 --- a/src/mainboard/getac/p470/ec_oem.h +++ b/src/mainboard/getac/p470/ec_oem.h @@ -32,8 +32,8 @@ #define RD_EC 0x80 // Read Embedded Controller #define WR_EC 0x81 // Write Embedded Controller #define BE_EC 0x82 // Burst Enable Embedded Controller -#define BD_EC 0x83 // Burst Disable Embedded Controller -#define QR_EC 0x84 // Query Embedded Controller +#define BD_EC 0x83 // Burst Disable Embedded Controller +#define QR_EC 0x84 // Query Embedded Controller int send_ec_oem_command(u8 command); int send_ec_oem_data(u8 data); -- cgit v1.2.3