From b145fd19603e4106747dea990e795a56f2324eb5 Mon Sep 17 00:00:00 2001
From: Sridhar Siricilla <sridhar.siricilla@intel.com>
Date: Mon, 10 Jan 2022 20:12:32 +0530
Subject: mb/google/brya: Adjust CSE RO and Data partition in the CSE region

The patch adjusts CSE region's internal partitions' (CSE RO and Data
partition) sizes to match with sizes of MFIT generated CSE Region's
internal partitions.

BUG=b:213993778
TEST=Generate coreboot for Brya and verify with MFIT generated
coreboot.

Cq-Depend: chrome-internal:4452789
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I5418c02f83134814e3f9959ee8c8da32ce8c7bec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60951
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/brya/chromeos.fmd | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/brya/chromeos.fmd b/src/mainboard/google/brya/chromeos.fmd
index 72c6429672..e44538395a 100644
--- a/src/mainboard/google/brya/chromeos.fmd
+++ b/src/mainboard/google/brya/chromeos.fmd
@@ -3,8 +3,8 @@ FLASH 32M {
 		SI_DESC 4K
 		SI_ME {
 			CSE_LAYOUT 8K
-			CSE_RO 1588K
-			CSE_DATA 512K
+			CSE_RO 1640K
+			CSE_DATA 420K
 			# 64-KiB aligned to optimize RW erases during CSE update.
 			CSE_RW 3008K
 		}
-- 
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