From b03e497ef16e9e38ba9220d31131a6bfdef35390 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 19 Apr 2021 01:42:33 +0200 Subject: soc/intel/cannonlake/romstage: Reuse device pointer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reuse `dev` pointer for SmbusEnable configuration and remove `smbus` pointer. Change-Id: I7ad7cdeb632eb52ae02b60ca51e7d4845dffdb0d Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/52490 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner Reviewed-by: Angel Pons --- src/soc/intel/cannonlake/romstage/fsp_params.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index c1fe5a7bf1..5eddf85770 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -136,7 +136,6 @@ static void soc_memory_init_params(FSPM_UPD *mupd, const config_t *config) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct device *smbus = pcidev_path_on_root(PCH_DEVFN_SMBUS); assert(dev != NULL); const config_t *config = config_of(dev); FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; @@ -145,10 +144,11 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) soc_memory_init_params(mupd, config); /* Enable SMBus controller based on config */ - if (!smbus) + dev = pcidev_path_on_root(PCH_DEVFN_SMBUS); + if (!dev) m_cfg->SmbusEnable = 0; else - m_cfg->SmbusEnable = smbus->enabled; + m_cfg->SmbusEnable = dev->enabled; /* Set debug probe type */ m_cfg->PlatformDebugConsent = -- cgit v1.2.3