From af9cd4d0cf085a1b48e80b658841599b3831b8cd Mon Sep 17 00:00:00 2001
From: "Ronald G. Minnich" <rminnich@gmail.com>
Date: Thu, 10 Aug 2006 03:23:48 +0000
Subject: change from AMD for the IRQ10 problem.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
src/mainboard/olpc/rev_a/auto.c | 14 +++++++++++++-
src/northbridge/amd/gx2/northbridge.c | 9 +++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/olpc/rev_a/auto.c b/src/mainboard/olpc/rev_a/auto.c
index d61532f39e..f0cd85d042 100644
--- a/src/mainboard/olpc/rev_a/auto.c
+++ b/src/mainboard/olpc/rev_a/auto.c
@@ -149,7 +149,18 @@ static void msr_init(void)
__builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
}
-
+static void gpio_init(void)
+{
+ unsigned long m;
+
+ /* Make sure events enable for gpio 12 is off */
+
+ m = inl(GPIOL_EVENTS_ENABLE);
+ m &= ~GPIOL_12_SET;
+ m |= GPIOL_12_CLEAR;
+ outl(m, GPIOL_EVENTS_ENABLE);
+}
+
static void main(unsigned long bist)
{
static const struct mem_controller memctrl [] = {
@@ -166,6 +177,7 @@ static void main(unsigned long bist)
* for cs5536
*/
cs5536_setup_onchipuart();
+ gpio_init();
uart_init();
console_init();
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 82175a5a66..1bb83868e3 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -276,11 +276,20 @@ static void enable_shadow(device_t dev)
static void northbridge_init(device_t dev)
{
+ unsigned long m;
+
struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info;
printk_debug("northbridge: %s()\n", __FUNCTION__);
enable_shadow(dev);
irq_init_steering(dev, nb->irqmap);
+
+ /* HACK HACK HACK HACK */
+ /* 0x1000 is where GPIO is being assigned */
+ m = inl(0x1038);
+ m &= ~GPIOL_12_SET;
+ m |= GPIOL_12_CLEAR;
+ outl(m, 0x1038);
}
/* due to vsa interactions, we need not not touch the nb settings ... */
--
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