From af4bad167d4ab07ba2d44666c878a0871d7f91cd Mon Sep 17 00:00:00 2001
From: Xi Chen <xixi.chen@mediatek.corp-partner.google.com>
Date: Thu, 18 Aug 2022 11:27:18 +0800
Subject: soc/mediatek/mt8188: Initialize DPM in ramstage

Add initialization of DPM drvier for DRAM low power mode.

DPM is an essential component on MediaTek SoC, so we initialize DPM
in soc_init().

This DPM flow adds 22ms to the boot time.

coreboot logs:
CBFS: Found 'dpm.dm' @0x156c0 size 0xfc in mcache @0xfffdd110
mtk_init_mcu: Loaded (and reset) dpm.dm in 6 msecs (422 bytes)
CBFS: Found 'dpm.pm' @0x15800 size 0x3c59 in mcache @0xfffdd140
mtk_init_mcu: Loaded (and reset) dpm.pm in 16 msecs (18910 bytes)

TEST=build pass
BUG=b:236331724

Signed-off-by: Xi Chen <xixi.chen@mediatek.corp-partner.google.com>
Change-Id: I46baa7b49e90d53dd4d1d95af9c46622faf30419
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66969
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/mediatek/mt8188/soc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/soc/mediatek/mt8188/soc.c b/src/soc/mediatek/mt8188/soc.c
index 5b2431bc25..dc04e29faa 100644
--- a/src/soc/mediatek/mt8188/soc.c
+++ b/src/soc/mediatek/mt8188/soc.c
@@ -1,8 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
 
 #include <bootmem.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <soc/dfd.h>
+#include <soc/dpm.h>
 #include <soc/emi.h>
 #include <soc/mcupm.h>
 #include <soc/mmu_operations.h>
@@ -26,6 +28,9 @@ static void soc_init(struct device *dev)
 	mcupm_init();
 	sspm_init();
 
+	if (dpm_init())
+		printk(BIOS_ERR, "dpm init failed, DVFS may not work\n");
+
 	if (CONFIG(MTK_DFD))
 		dfd_init();
 }
-- 
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