From ac1cd44525d7230a0138fdd3e442ad8b1363c4dc Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 6 Feb 2018 15:25:27 +0530 Subject: soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH This patch ensures soc/sata.c correctly translates pci config offset 0x92 Bit 0-2 [SATA Port x Present (SPDx)] 0 = Port x is enabled. 1 = Port x is disabled. Change-Id: Ide093dafe33b947ba7845cc0b74a975471353e39 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/23591 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/soc/intel/cannonlake/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index c3193e6090..dab6622ac0 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -39,6 +39,7 @@ config CPU_SPECIFIC_OPTIONS select RELOCATABLE_RAMSTAGE select SMM_TSEG select SMP + select SOC_AHCI_PORT_IMPLEMENTED_INVERT select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK @@ -61,6 +62,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_PMC select SOC_INTEL_COMMON_BLOCK_RTC select SOC_INTEL_COMMON_BLOCK_SA + select SOC_INTEL_COMMON_BLOCK_SATA select SOC_INTEL_COMMON_BLOCK_SCS select SOC_INTEL_COMMON_BLOCK_SMBUS select SOC_INTEL_COMMON_BLOCK_SMM -- cgit v1.2.3