From a8f76904fbd2edf09807ee21afeae0fea8510d7f Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Fri, 26 Feb 2021 09:32:15 -0700 Subject: nb/intel/haswell: Fix DPR size handling DPR register's size field is given in whole MiB, so correct where it is used to ensure the correct size multiple (KiB vs. MiB) is used with it. Fixes: 5d7c3a4f0 ("nb/intel/haswell/northbridge.c: Correct DPR handling") Change-Id: I3ca388907c61f1e47eab44ae8bc26e0f611fe1e3 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/51104 Reviewed-by: Angel Pons Reviewed-by: Nico Huber Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/northbridge/intel/haswell/northbridge.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index df9cc184d1..b19e7bd8b5 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -298,12 +298,12 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) /* 0xc0000 -> TSEG - DPR */ base_k = 0xc0000 >> 10; size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - base_k; - size_k -= dpr.size >> 10; + size_k -= dpr.size * MiB / KiB; ram_resource(dev, index++, base_k, size_k); /* TSEG - DPR -> BGSM */ resource = new_resource(dev, index++); - resource->base = mc_values[TSEG_REG] - dpr.size; + resource->base = mc_values[TSEG_REG] - dpr.size * MiB; resource->size = mc_values[BGSM_REG] - resource->base; resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED | IORESOURCE_CACHEABLE; -- cgit v1.2.3