From a8bda437d1f409c7e357a51e2b0f4d91bef31107 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 4 Jun 2015 23:36:01 -0600 Subject: cbmem: Break out CBMEM_ID to a separate header file The cbmem util needs the CBMEM_IDs and the strings for reporting and shares the cbmem.h file with coreboot. Split out the IDs so for a simpler sharing and no worries about overlap of standard libraries and other things in the header that coreboot requires, but the tool does not. Change-Id: Iba760c5f99c5e9838ba9426e284b59f02bcc507a Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/10430 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/include/cbmem.h | 89 +-------------------------------------- src/include/cbmem_id.h | 110 +++++++++++++++++++++++++++++++++++++++++++++++++ util/cbmem/cbmem.c | 2 +- 3 files changed, 113 insertions(+), 88 deletions(-) create mode 100644 src/include/cbmem_id.h diff --git a/src/include/cbmem.h b/src/include/cbmem.h index afee873f42..7afe960116 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -21,6 +21,8 @@ #ifndef _CBMEM_H_ #define _CBMEM_H_ +#include + #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \ ! IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) #define HIGH_MEMORY_SAVE (CONFIG_RAMTOP - CONFIG_RAMBASE) @@ -35,97 +37,10 @@ #define CBMEM_RESUME_BACKUP 0x614 #define CBMEM_FSP_HOB_PTR 0x614 -#define CBMEM_ID_ACPI 0x41435049 -#define CBMEM_ID_ACPI_GNVS 0x474e5653 -#define CBMEM_ID_ACPI_GNVS_PTR 0x474e5650 -#define CBMEM_ID_AGESA_RUNTIME 0x41474553 -#define CBMEM_ID_AMDMCT_MEMINFO 0x494D454E -#define CBMEM_ID_CAR_GLOBALS 0xcac4e6a3 -#define CBMEM_ID_CBTABLE 0x43425442 -#define CBMEM_ID_CONSOLE 0x434f4e53 -#define CBMEM_ID_COVERAGE 0x47434f56 -#define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9 -#define CBMEM_ID_ELOG 0x454c4f47 -#define CBMEM_ID_FREESPACE 0x46524545 -#define CBMEM_ID_FSP_RESERVED_MEMORY 0x46535052 -#define CBMEM_ID_FSP_RUNTIME 0x52505346 -#define CBMEM_ID_GDT 0x4c474454 -#define CBMEM_ID_HOB_POINTER 0x484f4221 -#define CBMEM_ID_IGD_OPREGION 0x4f444749 -#define CBMEM_ID_IMD_ROOT 0xff4017ff -#define CBMEM_ID_IMD_SMALL 0x53a11439 -#define CBMEM_ID_MEMINFO 0x494D454D -#define CBMEM_ID_MPTABLE 0x534d5054 -#define CBMEM_ID_MRCDATA 0x4d524344 -#define CBMEM_ID_NONE 0x00000000 -#define CBMEM_ID_PIRQ 0x49525154 -#define CBMEM_ID_POWER_STATE 0x50535454 -#define CBMEM_ID_RAM_OOPS 0x05430095 -#define CBMEM_ID_RAMSTAGE 0x9a357a9e -#define CBMEM_ID_RAMSTAGE_CACHE 0x9a3ca54e -#define CBMEM_ID_REFCODE 0x04efc0de -#define CBMEM_ID_REFCODE_CACHE 0x4efc0de5 -#define CBMEM_ID_RESUME 0x5245534d -#define CBMEM_ID_RESUME_SCRATCH 0x52455343 -#define CBMEM_ID_ROMSTAGE_INFO 0x47545352 -#define CBMEM_ID_ROMSTAGE_RAM_STACK 0x90357ac4 -#define CBMEM_ID_ROOT 0xff4007ff -#define CBMEM_ID_SMBIOS 0x534d4254 -#define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee -#define CBMEM_ID_SPINTABLE 0x59175917 -#define CBMEM_ID_STAGEx_META 0x57a9e000 -#define CBMEM_ID_STAGEx_CACHE 0x57a9e100 -#define CBMEM_ID_TIMESTAMP 0x54494d45 -#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0 -#define CBMEM_ID_VBOOT_WORKBUF 0x78007343 -#define CBMEM_ID_WIFI_CALIBRATION 0x57494649 -#define CBMEM_ID_TCPA_LOG 0x54435041 - #ifndef __ASSEMBLER__ #include #include -#define CBMEM_ID_TO_NAME_TABLE \ - { CBMEM_ID_ACPI, "ACPI " }, \ - { CBMEM_ID_ACPI_GNVS, "ACPI GNVS " }, \ - { CBMEM_ID_ACPI_GNVS_PTR, "GNVS PTR " }, \ - { CBMEM_ID_AGESA_RUNTIME, "AGESA RSVD " }, \ - { CBMEM_ID_AMDMCT_MEMINFO, "AMDMEM INFO" }, \ - { CBMEM_ID_CAR_GLOBALS, "CAR GLOBALS" }, \ - { CBMEM_ID_CBTABLE, "COREBOOT " }, \ - { CBMEM_ID_CONSOLE, "CONSOLE " }, \ - { CBMEM_ID_COVERAGE, "COVERAGE " }, \ - { CBMEM_ID_EHCI_DEBUG, "USBDEBUG " }, \ - { CBMEM_ID_ELOG, "ELOG " }, \ - { CBMEM_ID_FREESPACE, "FREE SPACE " }, \ - { CBMEM_ID_FSP_RESERVED_MEMORY, "FSP MEMORY " }, \ - { CBMEM_ID_FSP_RUNTIME, "FSP RUNTIME" }, \ - { CBMEM_ID_GDT, "GDT " }, \ - { CBMEM_ID_IMD_ROOT, "IMD ROOT " }, \ - { CBMEM_ID_IMD_SMALL, "IMD SMALL " }, \ - { CBMEM_ID_MEMINFO, "MEM INFO " }, \ - { CBMEM_ID_MPTABLE, "SMP TABLE " }, \ - { CBMEM_ID_MRCDATA, "MRC DATA " }, \ - { CBMEM_ID_PIRQ, "IRQ TABLE " }, \ - { CBMEM_ID_POWER_STATE, "POWER STATE" }, \ - { CBMEM_ID_RAM_OOPS, "RAMOOPS " }, \ - { CBMEM_ID_RAMSTAGE_CACHE, "RAMSTAGE $ " }, \ - { CBMEM_ID_RAMSTAGE, "RAMSTAGE " }, \ - { CBMEM_ID_REFCODE_CACHE, "REFCODE $ " }, \ - { CBMEM_ID_REFCODE, "REFCODE " }, \ - { CBMEM_ID_RESUME, "ACPI RESUME" }, \ - { CBMEM_ID_RESUME_SCRATCH, "ACPISCRATCH" }, \ - { CBMEM_ID_ROMSTAGE_INFO, "ROMSTAGE " }, \ - { CBMEM_ID_ROMSTAGE_RAM_STACK, "ROMSTG STCK" }, \ - { CBMEM_ID_ROOT, "CBMEM ROOT " }, \ - { CBMEM_ID_SMBIOS, "SMBIOS " }, \ - { CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " }, \ - { CBMEM_ID_SPINTABLE, "SPIN TABLE " }, \ - { CBMEM_ID_TIMESTAMP, "TIME STAMP " }, \ - { CBMEM_ID_VBOOT_HANDOFF, "VBOOT " }, \ - { CBMEM_ID_VBOOT_WORKBUF, "VBOOT WORK " }, \ - { CBMEM_ID_WIFI_CALIBRATION, "WIFI CLBR " }, - struct cbmem_entry; /* diff --git a/src/include/cbmem_id.h b/src/include/cbmem_id.h new file mode 100644 index 0000000000..b9c5ff2d9b --- /dev/null +++ b/src/include/cbmem_id.h @@ -0,0 +1,110 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2009 coresystems GmbH + * Copyright (C) 2013 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef _CBMEM_ID_H_ +#define _CBMEM_ID_H_ + +#define CBMEM_ID_ACPI 0x41435049 +#define CBMEM_ID_ACPI_GNVS 0x474e5653 +#define CBMEM_ID_ACPI_GNVS_PTR 0x474e5650 +#define CBMEM_ID_AGESA_RUNTIME 0x41474553 +#define CBMEM_ID_AMDMCT_MEMINFO 0x494D454E +#define CBMEM_ID_CAR_GLOBALS 0xcac4e6a3 +#define CBMEM_ID_CBTABLE 0x43425442 +#define CBMEM_ID_CONSOLE 0x434f4e53 +#define CBMEM_ID_COVERAGE 0x47434f56 +#define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9 +#define CBMEM_ID_ELOG 0x454c4f47 +#define CBMEM_ID_FREESPACE 0x46524545 +#define CBMEM_ID_FSP_RESERVED_MEMORY 0x46535052 +#define CBMEM_ID_FSP_RUNTIME 0x52505346 +#define CBMEM_ID_GDT 0x4c474454 +#define CBMEM_ID_HOB_POINTER 0x484f4221 +#define CBMEM_ID_IGD_OPREGION 0x4f444749 +#define CBMEM_ID_IMD_ROOT 0xff4017ff +#define CBMEM_ID_IMD_SMALL 0x53a11439 +#define CBMEM_ID_MEMINFO 0x494D454D +#define CBMEM_ID_MPTABLE 0x534d5054 +#define CBMEM_ID_MRCDATA 0x4d524344 +#define CBMEM_ID_NONE 0x00000000 +#define CBMEM_ID_PIRQ 0x49525154 +#define CBMEM_ID_POWER_STATE 0x50535454 +#define CBMEM_ID_RAM_OOPS 0x05430095 +#define CBMEM_ID_RAMSTAGE 0x9a357a9e +#define CBMEM_ID_RAMSTAGE_CACHE 0x9a3ca54e +#define CBMEM_ID_REFCODE 0x04efc0de +#define CBMEM_ID_REFCODE_CACHE 0x4efc0de5 +#define CBMEM_ID_RESUME 0x5245534d +#define CBMEM_ID_RESUME_SCRATCH 0x52455343 +#define CBMEM_ID_ROMSTAGE_INFO 0x47545352 +#define CBMEM_ID_ROMSTAGE_RAM_STACK 0x90357ac4 +#define CBMEM_ID_ROOT 0xff4007ff +#define CBMEM_ID_SMBIOS 0x534d4254 +#define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee +#define CBMEM_ID_SPINTABLE 0x59175917 +#define CBMEM_ID_STAGEx_META 0x57a9e000 +#define CBMEM_ID_STAGEx_CACHE 0x57a9e100 +#define CBMEM_ID_TIMESTAMP 0x54494d45 +#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0 +#define CBMEM_ID_VBOOT_WORKBUF 0x78007343 +#define CBMEM_ID_WIFI_CALIBRATION 0x57494649 +#define CBMEM_ID_TCPA_LOG 0x54435041 + +#define CBMEM_ID_TO_NAME_TABLE \ + { CBMEM_ID_ACPI, "ACPI " }, \ + { CBMEM_ID_ACPI_GNVS, "ACPI GNVS " }, \ + { CBMEM_ID_ACPI_GNVS_PTR, "GNVS PTR " }, \ + { CBMEM_ID_AGESA_RUNTIME, "AGESA RSVD " }, \ + { CBMEM_ID_AMDMCT_MEMINFO, "AMDMEM INFO" }, \ + { CBMEM_ID_CAR_GLOBALS, "CAR GLOBALS" }, \ + { CBMEM_ID_CBTABLE, "COREBOOT " }, \ + { CBMEM_ID_CONSOLE, "CONSOLE " }, \ + { CBMEM_ID_COVERAGE, "COVERAGE " }, \ + { CBMEM_ID_EHCI_DEBUG, "USBDEBUG " }, \ + { CBMEM_ID_ELOG, "ELOG " }, \ + { CBMEM_ID_FREESPACE, "FREE SPACE " }, \ + { CBMEM_ID_FSP_RESERVED_MEMORY, "FSP MEMORY " }, \ + { CBMEM_ID_FSP_RUNTIME, "FSP RUNTIME" }, \ + { CBMEM_ID_GDT, "GDT " }, \ + { CBMEM_ID_IMD_ROOT, "IMD ROOT " }, \ + { CBMEM_ID_IMD_SMALL, "IMD SMALL " }, \ + { CBMEM_ID_MEMINFO, "MEM INFO " }, \ + { CBMEM_ID_MPTABLE, "SMP TABLE " }, \ + { CBMEM_ID_MRCDATA, "MRC DATA " }, \ + { CBMEM_ID_PIRQ, "IRQ TABLE " }, \ + { CBMEM_ID_POWER_STATE, "POWER STATE" }, \ + { CBMEM_ID_RAM_OOPS, "RAMOOPS " }, \ + { CBMEM_ID_RAMSTAGE_CACHE, "RAMSTAGE $ " }, \ + { CBMEM_ID_RAMSTAGE, "RAMSTAGE " }, \ + { CBMEM_ID_REFCODE_CACHE, "REFCODE $ " }, \ + { CBMEM_ID_REFCODE, "REFCODE " }, \ + { CBMEM_ID_RESUME, "ACPI RESUME" }, \ + { CBMEM_ID_RESUME_SCRATCH, "ACPISCRATCH" }, \ + { CBMEM_ID_ROMSTAGE_INFO, "ROMSTAGE " }, \ + { CBMEM_ID_ROMSTAGE_RAM_STACK, "ROMSTG STCK" }, \ + { CBMEM_ID_ROOT, "CBMEM ROOT " }, \ + { CBMEM_ID_SMBIOS, "SMBIOS " }, \ + { CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " }, \ + { CBMEM_ID_SPINTABLE, "SPIN TABLE " }, \ + { CBMEM_ID_TIMESTAMP, "TIME STAMP " }, \ + { CBMEM_ID_VBOOT_HANDOFF, "VBOOT " }, \ + { CBMEM_ID_VBOOT_WORKBUF, "VBOOT WORK " }, \ + { CBMEM_ID_WIFI_CALIBRATION, "WIFI CLBR " }, +#endif /* _CBMEM_ID_H_ */ diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index e294c20578..3bc0fcd1a7 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -46,7 +46,7 @@ typedef uint16_t u16; typedef uint32_t u32; typedef uint64_t u64; -#include "cbmem.h" +#include "cbmem_id.h" #include "timestamp.h" #define CBMEM_VERSION "1.1" -- cgit v1.2.3