From a7cac0c21d85e651caaab2af7f8f1a7263e8abb9 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 19 Feb 2016 17:33:26 +0100 Subject: soc/*: fix uart's regwidth specification in cbtables coreboot passes information about the serial port implementation to payloads through a cbtables entry. We set the register width to 1 on most SoCs because that looked as good a default as any, but checking the uart structs they use, it's 4 for all of them. Change-Id: I9848f79737106dc32f864ca901c0bc48f489e6b8 Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/13746 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/broadcom/cygnus/ns16550.c | 2 +- src/soc/marvell/armada38x/uart.c | 2 +- src/soc/mediatek/mt8173/uart.c | 2 +- src/soc/nvidia/tegra124/uart.c | 2 +- src/soc/nvidia/tegra132/uart.c | 2 +- src/soc/nvidia/tegra210/uart.c | 2 +- src/soc/samsung/exynos5250/uart.c | 2 +- src/soc/samsung/exynos5420/uart.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/soc/broadcom/cygnus/ns16550.c b/src/soc/broadcom/cygnus/ns16550.c index 4a4702aab8..71a4cb08ef 100644 --- a/src/soc/broadcom/cygnus/ns16550.c +++ b/src/soc/broadcom/cygnus/ns16550.c @@ -119,7 +119,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = (uintptr_t)regs; serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/marvell/armada38x/uart.c b/src/soc/marvell/armada38x/uart.c index dbd8dca78f..c2800d0543 100644 --- a/src/soc/marvell/armada38x/uart.c +++ b/src/soc/marvell/armada38x/uart.c @@ -144,7 +144,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/mediatek/mt8173/uart.c b/src/soc/mediatek/mt8173/uart.c index a30fc411f4..adc8074ac1 100644 --- a/src/soc/mediatek/mt8173/uart.c +++ b/src/soc/mediatek/mt8173/uart.c @@ -177,7 +177,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = UART0_BASE; serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index 7fc8eb626d..1d4934b0a3 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -136,7 +136,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra132/uart.c b/src/soc/nvidia/tegra132/uart.c index 50569e03bf..a530e2dfa4 100644 --- a/src/soc/nvidia/tegra132/uart.c +++ b/src/soc/nvidia/tegra132/uart.c @@ -149,7 +149,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index 40ce6d26f1..1f16067049 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -123,7 +123,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS; serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index 9f644f1d0e..41ef4ae628 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -191,7 +191,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index 0508567d6d..359050abb2 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -182,7 +182,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); - serial.regwidth = 1; + serial.regwidth = 4; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); -- cgit v1.2.3