From a70093611f7c5c0dda273833e975dd56cfe260b0 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Sat, 14 Feb 2015 17:28:49 -0600 Subject: mainboard/asus/kfsn4-dre: Add memory interleave options to NVRAM These values were originally hard-coded in the AMD MCT wrapper. Change-Id: I12056d38d5348e70a44c192385e22e715e207792 Signed-off-by: Timothy Pearson Reviewed-on: http://review.coreboot.org/8454 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/mainboard/asus/kfsn4-dre/cmos.default | 2 ++ src/mainboard/asus/kfsn4-dre/cmos.layout | 6 ++++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mainboard/asus/kfsn4-dre/cmos.default b/src/mainboard/asus/kfsn4-dre/cmos.default index 56ee5d43d9..b82ee07b93 100644 --- a/src/mainboard/asus/kfsn4-dre/cmos.default +++ b/src/mainboard/asus/kfsn4-dre/cmos.default @@ -7,4 +7,6 @@ ECC_memory = Enable ECC_redirection = Disable ecc_scrub_rate = 1.28us interleave_chip_selects = Enable +interleave_nodes = Disable +interleave_memory_channels = Enable power_on_after_fail = Enable \ No newline at end of file diff --git a/src/mainboard/asus/kfsn4-dre/cmos.layout b/src/mainboard/asus/kfsn4-dre/cmos.layout index a111047884..9df3024b5a 100644 --- a/src/mainboard/asus/kfsn4-dre/cmos.layout +++ b/src/mainboard/asus/kfsn4-dre/cmos.layout @@ -54,8 +54,10 @@ entries 393 3 e 5 baud_rate 396 5 e 10 ecc_scrub_rate 401 1 e 1 interleave_chip_selects -402 2 e 8 max_mem_clock -404 1 e 2 multi_core +402 1 e 1 interleave_nodes +403 1 e 1 interleave_memory_channels +404 2 e 8 max_mem_clock +406 1 e 2 multi_core 412 4 e 6 debug_level 416 4 e 7 boot_first 420 4 e 7 boot_second -- cgit v1.2.3