From a6daff192f942b8310e090d4701e97df1709d0a8 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 13 Jan 2021 18:27:31 +0100 Subject: nb/intel/x4x: Constify write leveling arrays Change-Id: I3be3952aaba1fe2da5490b071b4e3609773e84a5 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/49403 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/x4x/dq_dqs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 0a65165271..867c862e5f 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -766,9 +766,9 @@ void search_write_leveling(struct sysinfo *s) u8 config, rank0, rank1, lane; struct dll_setting dq_setting; - u8 chanconfig_lut[16]={0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3}; + const u8 chanconfig_lut[16] = {0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3}; - u8 odt_force[8][4] = { /* [Config][leveling rank] */ + const u8 odt_force[8][4] = { /* [Config][leveling rank] */ {0x5, 0x6, 0x5, 0x9}, {0x5, 0x6, 0x5, 0x0}, {0x5, 0x0, 0x5, 0x9}, -- cgit v1.2.3