From a4756e3890c67f6456f993d0b16a8f1da6699965 Mon Sep 17 00:00:00 2001 From: Poornima Tom Date: Fri, 14 Jun 2024 03:48:59 +0530 Subject: mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE PCIe based Bluetooth is on port8. This cl enables bluetooth for PCIe based Wifi7 module. BUG=b:345596420 BRANCH=NONE TEST=With proper FW config enabled, BT gets detected on port8 Change-Id: I989cf6122f2555cc89f622e4ce5d21b574d0458e Signed-off-by: Poornima Tom Reviewed-on: https://review.coreboot.org/c/coreboot/+/83076 Reviewed-by: Eric Lai Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/nivviks/overridetree.cb | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index 22dd9ca2ac..bb567497dd 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -41,7 +41,8 @@ chip soc/intel/alderlake register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}" - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN (WIFI6) + register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for WIFI PCIE (WIFI7) # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ @@ -660,6 +661,9 @@ chip soc/intel/alderlake device ref usb2_port10 on probe WIFI_CATEGORY WIFI_6 end + device ref usb2_port8 on + probe WIFI_CATEGORY WIFI_7 + end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A0 (MLB)"" -- cgit v1.2.3