From a3495c0d7b249ce5cf53335d2036e31f1a86739c Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Fri, 11 Dec 2020 16:49:02 +0100
Subject: soc/intel/tigerlake: Drop unreferenced devicetree settings
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No mainboard uses these settings, nor does SoC code. Drop them.

Change-Id: I5f5da8dfcec7dd35981611830b555cab5d6af3e3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48572
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/tigerlake/chip.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 5c124de492..fe10d0dbcb 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -263,10 +263,8 @@ struct soc_intel_tigerlake_config {
 	uint8_t SmbusEnable;
 
 	/* Gfx related */
-	uint8_t IgdDvmt50PreAlloc;
 	uint8_t SkipExtGfxScan;
 
-	uint32_t GraphicsConfigPtr;
 	uint8_t Device4Enable;
 
 	/* HeciEnabled decides the state of Heci1 at end of boot
-- 
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