From 9e9f301b5878d269b7d6b6490279586fe533040a Mon Sep 17 00:00:00 2001 From: John Zhao Date: Wed, 13 May 2020 09:53:24 -0700 Subject: soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method CPU to PCH method refers to PCH ACPI operation region which was wrongly defined as SystemIO. This causes ACPI AE_LIMIT error from PM _DSW method. Change the operation region from SystemIO to SystemMemory to resolve this execution failure. BUG=b:140290596 TEST=Built and booted to kernel. _DSW method executes successfully without ACPI AE_LIMIT error. Signed-off-by: John Zhao Change-Id: I3965c3d891f7d3cf4a448edc0c3f7e7749a905a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41365 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/soc/intel/tigerlake/acpi/tcss.asl | 6 +++--- src/soc/intel/tigerlake/acpi/tcss_pcierp.asl | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index ce97782b93..7d586dd11e 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -45,10 +45,10 @@ Scope (\_SB) } /* - * Define PCH ACPIBASE I/O as an ACPI operating region. The base address can be + * Define PCH ACPIBASE as an ACPI operating region. The base address can be * found in Device 31, Function 2, Offset 40h. */ - OperationRegion (PMIO, SystemIO, PCH_PWRM_BASE_ADDRESS, 0x80) + OperationRegion (PMIO, SystemMemory, PCH_PWRM_BASE_ADDRESS, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset(0x6C), /* 0x6C, General Purpose Event 0 Status [127:96] */ , 19, @@ -74,7 +74,7 @@ Scope (\_SB) */ Method (C2PM, 4, NotSerialized) { - Local0 = 0x1 << Arg3 + Local0 = 1 << Arg3 /* This method is used to enable/disable wake from Tcss Device (WKEN). */ If (Arg0 && Arg1) { /* If entering Sx and enabling wake, need to enable WAKE capability. */ diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index 2b5531fc2a..a7eafa40bf 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -64,7 +64,7 @@ Field (PXCS, AnyAcc, NoLock, WriteAsZeros) */ Method (_DSM, 4, Serialized) { - return (Buffer() {0x00}) + Return (Buffer() {0x00}) } Device (PXSX) -- cgit v1.2.3