From 9d8cd507a60c625c78dec68ab7cfd2d27799f513 Mon Sep 17 00:00:00 2001 From: Youness Alaoui Date: Thu, 25 May 2017 15:30:35 -0500 Subject: purism/librem13v2: Enable SATA, disable eMMC support Change-Id: Ib63e5e8a1bcbc25c288dec7d1ef6c06239ada34b Signed-off-by: Youness Alaoui Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/19937 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/purism/librem13v2/devicetree.cb | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mainboard/purism/librem13v2/devicetree.cb b/src/mainboard/purism/librem13v2/devicetree.cb index 0b49433cb9..dc0655af50 100644 --- a/src/mainboard/purism/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem13v2/devicetree.cb @@ -28,10 +28,11 @@ chip soc/intel/skylake # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" + register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" - register "SataPortsEnable[0]" = "0" + register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[2]" = "1" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" @@ -40,8 +41,8 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "0" - register "ScsEmmcEnabled" = "1" - register "ScsEmmcHs400Enabled" = "1" + register "ScsEmmcEnabled" = "0" + register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "0" register "IshEnable" = "0" register "PttSwitch" = "0" -- cgit v1.2.3