From 9b675796a7407972a60c66ae5f9689f660e12a8e Mon Sep 17 00:00:00 2001 From: Nick Vaccaro Date: Tue, 29 Aug 2017 19:55:57 -0700 Subject: soc/intel/cannonlake: add *spi.c files to make Adds spi.c and gspi.c to verstage. Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28 Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/21284 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 9ce647daa4..dba04a85fa 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -44,6 +44,9 @@ postcar-y += pmutil.c postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c +verstage-y += gspi.c +verstage-y += spi.c + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake -- cgit v1.2.3