From 9970b61ad3049d87650cd7b4eb5f47d667098186 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 3 Aug 2019 23:18:01 +0300 Subject: arch/x86: Move TSEG_STAGE_CACHE implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is declared weak so that platforms that do not have smm_subregion() can provide their own implementation. Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/cpu/x86/smm/Makefile.inc | 4 ++++ src/cpu/x86/smm/stage_cache.c | 33 +++++++++++++++++++++++++++++++++ src/drivers/intel/fsp1_1/Makefile.inc | 3 --- src/drivers/intel/fsp1_1/stage_cache.c | 28 ---------------------------- src/soc/amd/picasso/ramtop.c | 10 ---------- src/soc/amd/stoneyridge/ramtop.c | 10 ---------- src/soc/intel/common/block/smm/smm.c | 12 ------------ 7 files changed, 37 insertions(+), 63 deletions(-) create mode 100644 src/cpu/x86/smm/stage_cache.c delete mode 100644 src/drivers/intel/fsp1_1/stage_cache.c diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 5c7aab3ffc..fe149f140f 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -42,6 +42,10 @@ endif ifeq ($(CONFIG_SMM_TSEG),y) +ramstage-y += stage_cache.c +romstage-y += stage_cache.c +postcar-y += stage_cache.c + smmstub-y += smm_stub.S smm-y += smm_module_handler.c diff --git a/src/cpu/x86/smm/stage_cache.c b/src/cpu/x86/smm/stage_cache.c new file mode 100644 index 0000000000..7806290d5c --- /dev/null +++ b/src/cpu/x86/smm/stage_cache.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +int __weak smm_subregion(int sub, void **base, size_t *size) +{ + return -1; +} + +void __weak stage_cache_external_region(void **base, size_t *size) +{ + if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { + printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); + *base = NULL; + *size = 0; + } +} diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index 10877b9482..1372e98565 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += fsp_util.c romstage-y += hob.c romstage-y += raminit.c romstage-y += romstage.c -romstage-y += stage_cache.c romstage-$(CONFIG_MMA) += mma_core.c ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c @@ -37,13 +36,11 @@ ramstage-y += fsp_relocate.c ramstage-y += fsp_util.c ramstage-y += hob.c ramstage-y += ramstage.c -ramstage-y += stage_cache.c ramstage-$(CONFIG_INTEL_GMA_ADD_VBT) += vbt.c ramstage-$(CONFIG_MMA) += mma_core.c CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include -postcar-y += stage_cache.c ifneq ($(CONFIG_SKIP_FSP_CAR),y) postcar-y += temp_ram_exit.c postcar-y += exit_car.S diff --git a/src/drivers/intel/fsp1_1/stage_cache.c b/src/drivers/intel/fsp1_1/stage_cache.c deleted file mode 100644 index ab0c1c0126..0000000000 --- a/src/drivers/intel/fsp1_1/stage_cache.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} diff --git a/src/soc/amd/picasso/ramtop.c b/src/soc/amd/picasso/ramtop.c index 4ff4252c76..f0051e4bfe 100644 --- a/src/soc/amd/picasso/ramtop.c +++ b/src/soc/amd/picasso/ramtop.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -82,15 +81,6 @@ static size_t smm_region_size(void) return CONFIG_SMM_TSEG_SIZE; } -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} - void smm_region(void **start, size_t *size) { *start = (void *)smm_region_start(); diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index 4ff4252c76..f0051e4bfe 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -82,15 +81,6 @@ static size_t smm_region_size(void) return CONFIG_SMM_TSEG_SIZE; } -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} - void smm_region(void **start, size_t *size) { *start = (void *)smm_region_start(); diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 489462dfa7..12c057b25a 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -22,18 +22,6 @@ #include #include #include -#include - -#if !CONFIG(PLATFORM_USES_FSP1_1) -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} -#endif void smm_southbridge_clear_state(void) { -- cgit v1.2.3