From 96c25cded4c12ffe93b9f27d975b7027e50fabc4 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 5 Aug 2020 23:41:05 +0200 Subject: cpu/intel/model_6fx: Include Conroe-L microcode This CPU variant has a different CPUID signature. Change-Id: Ice2c1b86382e5d91d9eda717e6522ed0a9c2229f Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/44248 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/cpu/intel/model_6fx/Makefile.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index f1d64b7454..f6f838de39 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -4,4 +4,5 @@ subdirs-y += ../common ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c subdirs-y += ../smm/gen1 -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*) \ + 3rdparty/intel-microcode/intel-ucode/06-16-01 -- cgit v1.2.3